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| 研究生： |
邱政文 Cheng-Wen Chiu |
|---|---|
| 論文名稱： |
蝠翼：一個晶圓圖特徵化與產生的歸納模型 Bat-Wing: An Inductive Model for Wafer Map Characterization and Generation |
| 指導教授： |
陳竹一
Jwu-E Chen |
| 口試委員: | |
| 學位類別： |
碩士 Master |
| 系所名稱： |
資訊電機學院 - 電機工程學系 Department of Electrical Engineering |
| 畢業學年度： | 94 |
| 語文別： | 中文 |
| 論文頁數： | 43 |
| 中文關鍵詞： | 晶圓圖分析 、晶圓圖特徵 |
| 外文關鍵詞： | wafer map characterization, spatial correlation |
| 相關次數： | 點閱：17 下載：0 |
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在製程變動的情況，晶片的良率會因為在晶圓上不同的位置下，會有不同的特徵。這些因製程而導致良率變化的特色，從晶圓圖的觀點來觀察是最容易了解的。在這篇論文中，我們從收集到的資料中歸納出晶圓圖會有以蝠翼良率的變化特色，然後將這變化的特色加入了空間相關性，最後提出一個具有空間相關性晶圓圖產生器並且是可以產生群聚的現象，同時也建構出一個快速分析群聚現象位置和大小的方法。
Under the process variation, the yield of the chips which are at the different locations with different characterization is in the same wafer. Because of the characterization of the yield of the process variation, it is the easiest observation from the viewpoint of the wafer-map. In this paper, we suggest a wafer map generator with the special correlation which is based on the characterization of the bat-wing yield. The wafer map generator can produce the cluster phenomenon, and the rapid method has been established to judge the position and size of the cluster.
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[2] Charles Gross, Kenneth W. Tobin, David Jensen and Dinesh Mehta “Assessing future technology requirements for rapid isolation and sourcing of faults”[online]. Available: http://www.micromagazine.com/archive/98/07
/jensen.html
[3] W. Maly, H.T. Heineken, J. Khare, P.K. Nag, P.Simon and C. Ouyang. ”Design-Manufacturing Interface: Part II – Applications,” proceedings of DATE, Feb 1998, pp. 557-562
[4] Hiroo Masuda, “Challenge: variability characterization and modeling for 65- to 90-nm processes,” IEEE custom integrated circuits conference 2005.
[5] 蘇文彬,“Application of wafer map analysis for yield learning”碩士論文﹐中華大學﹐2003.
[6] 鄭國樟, “SB_WMG: A Syndrome-Based Wafer Map Generator for Characterizing Process Variation” 碩士論文﹐中華大學﹐2005.
[7] W. Maly, H.T. Heineken, J. Khare, and P.K. Nag, ” Design -Manufacturing Interface: Part I – Vision,” proceedings of DATE, Feb 1998, pp. 550-556.
[8] yieldWerx Semiconductor, Reports Gallery –Zone Yield [online]. Available: http://www.yieldwerx.com/z5.htm
[9] J. Cain and C. Spanos, “Electrical linewidth metrology for systematic CD variation characterization and causal analysis,” Metrologe, Inspection, and process Control for Microlithography XVII, Proceedings of SPIE vol. 5038, 2003, pp.350-361.
[10] P. Friedberg, Y. Cao, J. Cain,R. Wang, J. Rabaey, and C. Spanos, “Modeling within-die spatial correlation effects for process-design co-optimization,” in sixth international Symposition on Quality of Electronic Design, March 2005, pp. 516-521.
[11] 陳憲治, “Whirlpool II：一個具多樣觀察面的晶圓分析器” 碩士論文, 中華大學, 1999.
