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研究生: 王又意
You-Yi Wang
論文名稱: 以軟體定義無線電平台設計與實現4-FSK叢發通訊收發機
Design and Implementation of a 4-FSK Burst Communication Transceiver with SDR
指導教授: 陳逸民
口試委員:
學位類別: 碩士
Master
系所名稱: 資訊電機學院 - 通訊工程學系
Department of Communication Engineering
論文出版年: 2021
畢業學年度: 109
語文別: 中文
論文頁數: 74
中文關鍵詞: FSK渦輪碼FPGA硬體實現
相關次數: 點閱:12下載:0
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  • 以SDR平台實現FSK無線通訊收發機,其中通道編碼的部分使用渦輪碼,並在發射機部分以4FSK進行調變,且在其中加入前置訊號方便接收機做時間同步。在軟體模擬部分用可加性高斯白雜訊(Additive white Gaussian noise,AWGN)通道來模擬其效能,確定接收機能夠順利解回訊號,再實現於FPGA驗證版上,並將其結果導入Matlab軟體中做確認,確定每個模組都能順利解回訊號。


    The FSK wireless communication transceiver is realized on the SDR platform, in which the channel coding part uses turbo code, and the transmitter part is modulated by 4FSK, and the pre-signal is added to facilitate the receiver to synchronize the time. In the software simulation part, the additive white Gaussian noise (AWGN) channel is used to simulate its performance, to make sure that the receiver can decode the signal smoothly, and then implement it on the FPGA verification version, and import the result into the Matlab software Confirm in the process to make sure that each module can resolve the signal smoothly.

    中文摘要 i Abstract ii 誌謝 iii 目錄 iv 圖目錄 vii 表目錄 x 第一章 緒論 1 1-1 研究動機與背景 1 1-2 章節提要 1 第二章 渦輪碼 3 2-1 簡介 3 2-2 編碼器 3 2-2-1 網格收斂 4 2-2-2 交錯器 4 2-3 渦輪碼解碼器 6 2-3-1 原理簡介 6 2-3-2 MAP演算法 7 2-3-3 迭代次數模擬圖 10 第三章 FSK無線通訊收發機 12 3-1 簡介 12 3-2 FSK無線通訊發射機 13 3-2-1 DEMUX模組 13 3-2-2 訊框架構(Frame Structure) 14 3-2-3 頻率偏移調變(Frequency Shift Keying) 14 3-2-4 坐標軸數位旋轉計算器(CORDIC)演算法 16 3-2-5 旋轉因子產生單元 18 3-3 FSK無線通訊接收機 18 3-3-1 匹配濾波器(Matched Filter) 18 3-3-2 訊框同步(Frame Synchronization) 20 3-3-3 軟式決策(Soft Decision) 24 第四章 硬體架構設計 25 4-1 硬體簡介 25 4-2 發射機硬體架構 25 4-2-1 渦輪碼編碼器 26 4-2-2 DEMUX模組 26 4-2-3 訊框架構模組 27 4-2-4 4FSK模組 28 4-3 接收機硬體架構 33 4-3-1 匹配濾波器模組 34 4-3-2 訊框同步模組 35 4-3-3 軟式決策器 36 4-3-4 渦輪碼解碼器 37 第五章 軟體定義無線電平台 38 5-1 軟體定義無線電 38 5-2 軟體定義無線電平台 38 5-3 FPGA(AC701) 39 5-4 RF Module(AD9361) 39 第六章 模擬與硬體實驗結果 41 6-1 發射機模擬結果 41 6-2 發射機結果 43 6-3 接收機模擬結果 45 6-4 接收機結果 49 6-5 軟體收發機性能模擬 54 6-6 合成結果 55 第七章 結論 56 參考文獻 57

    [1] 洪維崧, “FPGA Implementation of LTE Turbo code Decoder”, 國立中央大學,碩士論文, Jun. 2018.
    [2] Shih-Jie Li, “Low-Power Adaptive Viterbi Decoder with Section Error Identification”, 國立中山大學, 碩士論文, Jul. 2011.
    [3] 高志偉, "Circuit Design of Maximum a Posteriori Algorithm for Turbo Code Decoder", 國立中山大學, 碩士論文, Jul. 2010.
    [4] 陳德龍, “Design and FPGA Implementation of Baseband Transmitter for DVB-T System”, 國立中央大學, 碩士論文, Jun. 2014.
    [5] 劉子群, “Implementation of High Throughput Codec for Wideband OFDM Tranceiver with SDR Platform”, 國立中央大學,碩士論文, Dec. 2019.
    [6] Xing Chen, Hun-Seok Kim, David D. Wentzloff, “An analysis of phase noise requirements for ultra-low-power FSK radios”, 2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) , Jul. 2017.
    [7] R. Abinaya, C. Jayasri, “VHDL implementation of MIMO based FSK for reconfigurable applications”, 2015 Online International Conference on Green Engineering and Technologies (IC-GET), Apr. 2016.
    [8] Yongjun Xie, Xiaoyi Hu, Jing Xiao, Deqing Wang, Wangwei Lei, “Implementation of timing synchronization for OFDM Underwater Communication System on FPGA”, 2009 3rd International Conference on Anti-counterfeiting, Security, and Identification in Communication, Oct. 2009.
    [9] Peibin Zhu, Xiaomei Xu, Xingbin Tu, Yougan Chen, Yi Tao, “Anti-Multipath Orthogonal Chirp Division Multiplexing for Underwater Acoustic Communication”, IEEE Access, Vol. 8, pp. 13305 - 13314, Jan. 2020.
    [10] Yong Li, Xuejun Sha, Kun Wang, “Hybrid Carrier Communication with Partial FFT Demodulation over Underwater Acoustic Channels”, IEEE Communications Letters, Vol. 17, no. 12, pp. 2260-2263, Nov. 2013.

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