| 研究生: |
黃彥翔 Yen-hsiang Huang |
|---|---|
| 論文名稱: |
高效率物件切割硬體加速器設計與立體視覺應用 Design and Implementation of a High-Efficiency Segmentation Hardware Accelerator and Application in Stereo Vision |
| 指導教授: |
陳慶瀚
Ching-han Chen |
| 口試委員: | |
| 學位類別: |
碩士 Master |
| 系所名稱: |
資訊電機學院 - 資訊工程學系 Department of Computer Science & Information Engineering |
| 畢業學年度: | 100 |
| 語文別: | 中文 |
| 論文頁數: | 103 |
| 中文關鍵詞: | SOM神經網路 、立體視覺 、物件切割 、FPGA |
| 外文關鍵詞: | stereo vision, segmentation, FPGA, SOM neural network |
| 相關次數: | 點閱:13 下載:0 |
| 分享至: |
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典型的立體視覺原理是基於雙攝影機同步取像和一系列複雜的影像處理,在軟體開發通常需要高效能的處理器以實現複雜演算法,因此使得立體視覺在即時與嵌入式系統的實現開發上受到成本與即時性技術上的限制。本研究藉由MIAT嵌入式硬體設計方法論,設計一個基於SOM神經網路的高效率物件切割硬體加速器,對影像進行色彩切割,並將物件連通標定與基於SAD的立體匹配演算法設計成硬體電路,再以管線化控制器進行平行化架構整合,進而合成全硬體的高速立體視覺系統。其性能可達13.8 Frames/sec,可滿足即時系統需求。其中的高效率物件切割硬體加速器,大幅減少物件切割模組的記憶體存取次數,有效提升物件切割效能。
A typical stereo vision principle basically consists of two parts. One is the image extracted using two synchronous cameras, and another is a series of complex image processing. However, high-efficacy processors are often required to implement complex algorithms in software development. Thus, stereo vision is difficult to be achieved on the embedded system applications, because of its low-cost and limited resources. In this paper, we designed a high-efficiency segmentation hardware accelerator, based on SOM (Self-Organizing Map) neural network and using Hierarchical Robotic Discrete-Event Modeling, for color segmentation. Then, all the algorithms, connecting component labeling and stereo matching using SAD (Sum of Absolute Difference), were implemented as hardware and integrated with a pipeline controller. Finally, we synthesize a high-speed stereo vision as hardware system. As a result, our system is able to generate images at the speed of up to 13.8 images / sec. This performance makes our system usable in real-time embedded systems. Above all, we reduce the memory access times significantly and raise the performance effectively in high-efficiency segmentation hardware accelerator.
[1] Sang Hwa Lee and Siddharth Sharma, “Real-Time Disparity Estimation Algorithm For Stereo Camera Systems”, IEEE Transactions on Consumer Electronics, Vol. 57, No. 3, August 2011.
[2] 陶金旭、翁松佑和俞伯璋,「階層式模糊聚類演算法於影像分割之應用」,行政院國家科學委員會專題研究計畫成果報告,民國91年10 月。
[3] Carlo Dal Mutto and Pietro Zanuttigh and Guido M. Cortelazzo, “Scene Segmentation Assisted by Stereo Vision”, IEEE Department of Information Engineering, 2011.
[4] Bram van Ginneken*, Alejandro F. Frangi, Joes J. Staal, Bart M. ter Haar Romeny, and Max A. Viergever, “Active Shape Model Segmentation With Optimal Features,” IEEE TRANSACTIONS ON MEDICAL IMAGING, VOL. 21, NO. 8, AUGUST 2002.
[5] Viet-Quoc Pham, Keita Takahashi, et al., ”Foreground-Background Segmentation using Iterated Distribution Matching”, IEEE Computer Vision and Pattern Recognition, 20-25 June 2011.
[6] Theo Gevers, “Adaptive Image Segmentation by Combining Photometric Invariant Region and Edge Information”, IEEE TRANSACTIONS ON PATTERN ANALYSIS AND MACHINE INTELLIGENCE, VOL. 24, NO. 7, JULY 2002.
[7] A. Redert, E. Hendricks, and J. Biemond, “Correspondence estimation in image pairs”, IEEE Signal Proc. Magazine, vol. 16, no. 3, pp. 29-46, 1999.
[8] D. Scharstein and R. Szeleiski, “A taxonomy and evaluation of dense two frame stereo correspondence algorithm”, International Journal of Computer Vision, vol. 47, no. 1/2/3, pp. 7-42, 2002.
[9] K. L. Chung and W. Y. Chen, “Fast adaptive PNN-based thresholding algorithms,” Pattern Recognition, 36(12), p.2793-2804, 2003.
[10] Chris Stauffer and W. Eric L. Grimson, “Learning Patterns of Activity Using Real-Time Tracking,” IEEE TRANSACTIONS On PATTERN ANALYSIS And MACHINE INTELLIGENCE, VOL. 22, NO. 8, AUGUST 2000.
[11] Ching-Han Chen, Jia-Hong Dai, and Chen-Yuan Chen, “The Design and Synthesis Using Hierarchical Robotic Discrete-Event Modeling,” Journal of Vibration and Control, 2012.
[12] Wan-Yu Chen, “Fast Algorithm and Architecture Design for Stereo Image Synthesis System,” July 27, 2006.
[13] 三維掃描器與機器視覺原理與發展歷程,2011-10-15,取自http://www.sntar.com/news/3d-information//news/3d-information389.html。
[14] Wu, ” System Design and Hardware Implementation of Embedded Stereo Vision”, Master Thesis, National Central University, 2011.
[15] K. H. Chang, et al., ”A study on the economic polarized light stereoscopic projection system,” Master Thesis, National Central University, Department of Optics and Photonics, p.7-14, 2007.
[16] N. Otsu, “A threshold selection method from gray level histogram,” IEEE transactions on System, Man, and Cybernetics, SMC-8, 1978, p.62-66.
[17] J. N. Kapur, P. K. Sahoo, and A. K. C. Wong, “A new method for gray-level picture thresholding using the entropy of the histogram,” Computer Vision Graphics,and Image Processing, 29(3), p.273-285, 1985.
[18] K. L. Chung and W. Y. Chen, “Fast adaptive PNN-based thresholding algori- thms,” Pattern Recognition, 36(12), p.2793-2804, 2003.
[19] G.J. McLachlan. “The classification and mixture maximum likelihood approaches to cluster analysis”, In Handbook of Statistics, 1982.
[20] D.A. Binder. “Bayesian cluster analysis” Biometrika, 1978.
[21] A.D. Gordon, J.T. Henderson. “Algorithm for Euclidean sum of squares classification”, Biometrics, 1977.
[22] J. T. Tou and R. C. Gonazlez, “Pattern Recognition Principles,” Reading MA:Addison-Wesley , 1974.
[23] O. Verevka, “The local K-means algorithm for color image quantization,” M.Sc. dissertation, Univ. Alberta, Edmonton, AB,Canada, 1995.
[24] E.H. Ruspini. “A new approach to clustering” Information and Control, 1969.
[25] L.A. Zadeh. “Fuzzy sets. Information Control”, June 1965.
[26] J.C. Bezdek. “Pattern Recognition with Fuzzy Objective Function”, Plenum, New York, 1981.
[27] A. H. Dekker, “Kohonen neural networks for optimal color quantization”, Network: Computat. Neural Syst., Volume 5, 1994.
[28] 蘇木春,張孝德,機器學習:類神經網路、模糊系統以及基因演算法則,修訂二版,全華圖書,2007。
[29] 陳慶瀚,「類神經網路:Self-Organizing Map Neural Network」。義守大學電機系,2002。
[30] 張仁明,林達德:類神經網路與貝氏方類法應用於影像分割之比較研究。國立台灣大學生物產業機電工程學研究所,取自agriauto.bime.ntu.edu.tw/printed/ciam/ciam08/8-3/8-3-6.pdf
[31] O. Veksler, “Fast variable window for stereo correspondence using integral images,” in Proceedings of IEEE Computer Society Conference on Computer Vision and Pattern Recognition, Volume.1, p. I-556-I-561, 2003.
[32] Sang Hwa Lee and Siddharth Sharma, “Real-Time Disparity Estimation Algorithm For Stereo Camera Systems”, IEEE Transactions on Consumer Electronics, Vol. 57, No. 3, August 2011.
[33] Konstantinos G. Derpanis, “The Gaussian Pyramid”, February 5, 2005.
[34] Jasmine Banks, “Reliability Analysis of the Rank Transform for Stereo Matching”, IEEE Transactions on Systems, Man, and Cybernetics, VOL. 31, NO. 6, 2001
[35] O. Veksler, “Fast variable window for stereo correspondence using integral images,” in Proceedings of IEEE Computer Society Conference on Computer Vision and Pattern Recognition, Volume.1, p. I-556-I-561, 2003.
[36] Y. Ohta and T. Kanade, “Stereo by intra- and inter-scanline search using dynamic programming”, IEEE transactions on pattern analysis and machine intelligence, Volume. 7, p. 139-154, 1985.
[37] J. Sun, N.-N. Zheng and H.-Y. Shum, “Stereo Matching Using Belief Propagation,” IEEE transactions on Pattern Analysis and Machine Intelligence, Volume. 25, No. 7, 2003.
[38] Q. Yang, L. Wang, R. Yang, S. Wang, M. Liao, and D. Nister, “Real-time global stereo matching using hierarchical belief propagation,” in Proceedings of The British Machine Vision Conference, 2006.
[39] K. Obermayer, H. Ritter, and K. Schulten, “Large-scale simulations of self-organizing neural networks on parallel computers: Application tobiological modeling,” Parallel Comput., vol. 13, no. 3, pp. 381–404,1990.
[40] R. Mann and S. Haykin, “A parallel implementation of Kohonen feature maps on the warp systolic computer,” in Proc. Int. Joint Conf. Neural Networks, vol. 2, Washington, DC, 1990, pp. 84–87.
[41] H. Siemon and A. Ultsch, “Kohonen networks on transputers: Implementation and animation,” in Proc. Int. Neural Network Conf., vol. 2, 1990, pp. 643–646.
[42] David C. Hendry, Andrew A. Duncan and Neil Lightowler, “IP Core Implementation of a Self-Organizing Neural Network,” IEEE Transactions on Neural Networks, Vol. 14, no. 5, September 2003.
[43] M. S. Melton, T. Phan, D. S. Reeves, and D. E. Van den bout, “The TInMANN VLSI chip,” IEEE Trans. Neural Networks, vol. 3, pp. 375–384,May 1992.
[44] T. Hamalainen, J. Sarrinen, and K. Kaski, “TUTNC: A general purposeparallel computer for neural network computations,” Microprocess. Microsyst., vol. 19, no. 8, pp. 447–465, Oct. 1995.
[45] P. Kolinummi, P. Hamalainen, T. Hamalainen, and J. Saarinen, “PARNEU: General-purpose partial tree computer,” Microprocess.Microsyst., vol. 24, pp. 23–42, 2000.
[46] Omnivision, SCCB Specifications.
[47] 2003 Vincent Bockaert,取自網路http://www.123di.com/dpr.php.
[48] H. Flatt, S. Blume, S. Hesselbarth, T. Schunemann, P. Pirsch , “A Parallel Hardware Architecture for Connected Component Labeling Based on Fast Label Merging”, Application-Specific Systems, Architectures and Processors, p. 144-149, 2008.
[49] Logitech, C510 Getting Started with Guide.
[50] Mayer, R.J., “IDEF0 Function Modeling,” Air Force Systems Command, May , 1992.
[51] David, R, “Grafcet :A powerful tool for specification of logic controllers,” IEEE Trans on control systems technology, Volume3, No 3, p253-268, 1995.
[52] Peter Alfke, “Efficient Shift Registers, LFSR Counters, and Long Pseudo-Random Sequence Generators,” XILINX Application Note, July 1996.
[53] Altera, DE2-115 User Manual.
[54] OmniVision OV7725 datasheet.
[55] I. Manolakos and E. Logaras,”HIGH THROUGHPUT SYSTOLIC SOM IP CORE FOR FPGAs”, Department of Informatics and Telecommunications, IEEE, 2007.
[56] W. Kurdthongmee, “A novel Kohonen SOM-based image compression architecture suitable for moderate density FPGAs”, Image and Vision Computing, 2007.
[57] M. Porrmann, S. Ruping, U. Ruckert, “SOM Hardware with Acceleration Module for Graphical Representation of the Learning Process”, Conference Publications, IEEE, 380 - 386, 1999.