本論文利用不同的製程設計功率放大器，在設計上分成兩部份，第一部份為全積體整合矽製程包含CMOS與SiGe設計高效率功率放大器，並使用不同的低損耗阻抗轉換變壓器技術，設計三個高效率E類功率放大器；第二部份則是全積體整合pHEMT製程設計功率放大器以操作於Ka頻帶功率放大器為主要目標。
各電路特性量測如下：傳輸線變壓器技術之CMOS E類功率放大器，增益量測為13.24 dB，1-dB增益壓縮點輸出功率為23.2 dBm，飽和輸出功率為24.7 dBm，效率為33.24 %；雙級傳輸線變壓器技術之CMOS AB類/E類功率放大器，增益量測結果為17.2 dB，1-dB增益壓縮點輸出功率為17.2 dBm，飽和輸出功率為20.03 dBm，效率為17.7 %；巴倫變壓器技術之SiGe E類功率放大器，增益量測結果為11.6 dB，1-dB增益壓縮點輸出功率為20.85 dBm，飽和輸出功率為22.83 dBm，效率為38.41 %；應用於Ka頻段pHEMT製程功率放大器，增益量測結果為15.7 dB，輸入回返損耗約為18.4 dB，輸出回返損耗約為6.1 dB，1-dB增益壓縮點輸出功率為18.7 dBm，飽和輸出功率為19.7 dBm，效率為24.4 %。

In this thesis, power amplifiers were designed into both silicon-based and pHEMT technologies. Firstly, fully integrated silicon-based high-efficiency Class-E power amplifiers using SiGe and CMOS processes were designed with low-loss impedance matching transformers technique. Secondly, a fully integrated Ka-band pHEMT power amplifier was implemented.
The measured results are summarized as below: the CMOS Class-E power amplifier (PA) using transmission line transformer (TLT) technique achieves a power gain of 13.24 dB, an output power at 1-dB gain compression point (P1dB) of 23.2 dBm, a saturation output power (Psat) of 24.7 dBm and a power-added efficiency (PAE) of 33.24 %. The two-stage CMOS Class-AB/Class-E power amplifier using transmission line transformer technique achieves a power gain of 17.2 dB, a P1dB of 17.2 dBm, a Psat of 20.03 dBm and a PAE of 17.7 %. The SiGe Class-E power amplifier with balun transformer achieves a power gain of 11.16 dB, a P1dB of 20.85 dBm, a Psat of 22.83 dBm and a PAE of 38.41 %. The Ka-band pHEMT power amplifier achieves a power gain of 15.7 dB with input return and output return losses of 18.4 dB and 6.1 dB, a P1dB of 18.7 dBm, a Psat of 19.7 dBm and a PAE of 24.4 %.

[1]A. Mazzanti, L. Larcher, R. Brama, and F. Svelto, “Analysis of reliability and power efficiency in cascode Class-E PAs,” IEEE J. Solid-State Circuits, vol. 41, no. 5, pp. 1222–1229, May 2006.
[2]Y. Song, S. Lee, E. Cho, J. Lee, and S. Nam, “A CMOS Class-E power amplifier with voltage stress relief and enhanced efficiency,” IEEE Trans. Microw. Theory Tech., vol. 58, no. 2, pp. 310–317, Feb. 2010.
[3]W. H. Doherty, “A new high efficiency power amplifier for modulated waves,” IEEE Proceedings of the Institute of Radio Engineers (IRE), vol. 24, no. 9, pp. 1163–1182, Sep. 1936.
[4]M. Iwamoto, A. Williams, P.-F. Chen, A. G. Metzger, L. E. Larson, and P. M. Asbeck, “An extended Doherty amplifier with high efficiency over a wide power range,” IEEE Trans. Microw. Theory Tech., vol. 49, no. 12, pp. 2472–2479, Dec. 2001.
[5]G. Hanington, P.-F. Chen, P. M. Asbeck, and L. E. Larson, “High-efficiency power amplifier using dynamic power-supply voltage for CDMA applications,” IEEE Trans. Microw. Theory Tech., vol. 47, no. 8, pp. 1471–1476, Aug. 1999.
[6]G. Hau, T. B. Nishimura, and N. Iwata, “A highly efficient linearized wide-band CDMA handset power amplifier based on predistortion under various bias conditions,” IEEE Trans. Microw. Theory Tech., vol. 49, no. 6, pp. 1194–1201, Jun. 2001.
[7]N. O. Sokal and A. D. Sokal, “Class-E-A new class of high-efficiency tuned single-ended switching power amplifiers,” IEEE J. Solid-State Circuits, vol. SC-10, no. 3, pp. 168–176, Jun. 1975.
[8]W. Bakalski, W. Simburger, H. Knapp, H.-D. Wohlmuth, and A. L. Scholtz, “Lumped and distributed lattice-type LC-baluns,” IEEE MTT-S Int. Microw. Symp. Dig., pp. 209–212, Jun. 2002.
[9]A. V. Grebennikov and H. Jaeger, “Class E with parallel circuit-A new challenge for high-efficiency RF and microwave power amplifiers,” IEEE MTT-S Int. Microw. Symp. Dig., vol. 3, pp. 1627–1630, Jun. 2002.
[10]Andrei Grebennikov, RF and Microwave Power Amplifier Design. McGraw-Hill, 2005.
[11]Pieter L. D. Abrie, Design of RF and Microwave Amplifiers and Oscillators. Artech House, 2000.
[12]T. Sowlati and D. M. W. Leenaerts, “A 2.4-GHz 0.18-?m CMOS self-biased cascode power amplifier,” IEEE J. Solid-State Circuits, vol. 38, no. 8, pp. 1318–1324, Aug. 2003.
[13]C.-C. Yen and H.-R. Chuang, “A 0.25-?m 20-dBm 2.4-GHz CMOS power amplifier with an integrated diode linearizer,” IEEE Microw. Wireless Compon. Lett., vol. 13, no. 2, pp. 45–47, Feb. 2003.
[14]R. Brama, L. Larcher, A. Mazzanti, and F. Svelto, “A 1.7-GHz 31dBm differential CMOS Class-E Power Amplifier with 58% PAE,” IEEE Custom Integrated Circuits Conf., pp. 551–554. Sep. 2007.
[15]R. Brama, L. Larcher, A. Mazzanti, and F. Svelto, “A 30.5 dBm 48% PAE CMOS Class-E PA With Integrated Balun for RF Applications,” IEEE J. Solid-State Circuits, vol. 43, no. 8, pp. 1755–1762, Aug. 2008.
[16]N. Kumar, C. Prakash, A. Grebennikov, and A. Mediano, “High-efficiency broadband parallel-circuit Class E RF power amplifier with reactance compensation technique,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 3, pp. 604–612, Mar. 2008.
[17]D. H. Lee, C. Park, J. Han, Y. Kim, S. Hong, C.-H. Lee, and J. Laskar, “A load-shared CMOS power amplifier with efficiency boosting at low power mode for polar transmitters,” IEEE Trans. Microw. Theory Tech., vol. 56, no. 7, pp. 1565–1674, Jul. 2008.
[18]H. Lee, C. Park, and S. Hong, “A quasi-four-pair Class-E CMOS RF power amplifier with an integrated passive device transformer,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 4, pp. 752–759, Apr. 2009.
[19]M. Acar, A. J. Annema, and B. Nauta, “Analytical design equations for Class-E power amplifiers,” IEEE Trans. Circuits Syst., vol. 54, no. 12, pp. 2706–2717, Dec. 2007.
[20]O. Lee, K. H. An, H. Kim, D. H. Lee, J. Han, K. S. Yang, C.-H. Lee, and J. Laskar, “Analysis and design of fully integrated high-power parallel-circuit Class-E CMOS power amplifiers,” IEEE Trans. Circuits Syst., vol. 57, no. 3, pp. 725–734, Mar. 2010.
[21]Y.-J.E. Chen, C.-Y. Liu, T.-N. Luo, and D. Heo, “A high-efficient CMOS RF power amplifier with automatic adaptive bias control,” IEEE Microw. Wireless Compon. Lett., vol. 16, no. 11, pp. 615–617, Nov. 2006.
[22]L.-Y. Yang, H.-S. Chen, and Y.-J. E. Chen, “A 2.4 GHz fully integrated cascode-cascade CMOS Doherty power amplifier,” IEEE Microw. Wireless Compon. Lett. , vol. 18, no. 3, pp. 197–199, Mar. 2008.
[23]S. A. Z. Murad, R. K. Pokharel, H. Kanaya, and K. Yoshida, “A 2.4 GHz 0.18-?m CMOS Class E single-ended power amplifier without spiral inductors,” IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF), pp. 25－28, Jan. 2010.
[24]R. Negra and W. Bächtold, “Lumped-element load-network design for Class-E power amplifiers,” IEEE Trans. Microw. Theory Tech., vol. 54, no. 6, pp. 2684–2690, Jun. 2006.
[25]J. C. Park and J. Y. Park, “Lattice-type balun with enhanced phase characteristic based on organic system on a package technology,” Microw. Opt. Tech. Lett., vol. 51, no. 2, pp. 399–402, Feb. 2009.
[26]T.-Y. Yang, L.-C. Pai, and H.-K. Chiou, “A compact Ka-band power amplifier using finite-ground coplanar waveguide design,” in Proc. Asia-Pacific Microw. Conf. (APMC), vol. 5, pp. 2959–2962, Dec. 2005.
[27]T. Tokumitsu, “K-band and millimeter-wave MMICs for emerging commercial wireless applications,” IEEE Trans. Microw. Theory Tech., vol. 49, no. 11, pp. 2066–2072, Nov. 2001.
[28]B. Koo, C. Park, K. A. Lee, J.-H. Chun, and S. Hong, “A 28-dBm pHEMT Power Amplifier Using Voltage Combiner for K-Band Applications,” European Microw. Conf. (EuMC), pp. 293–296, Oct. 2008.
[29]R. Negra and W. Bachtold, “Switched-mode high-efficiency Ka-band MMIC power amplifier in GaAs pHEMT technology,” IEEE International Symp. on Electron Devices for Microw. Optoelectronic Applications (EDMO), pp. 15–18, Nov. 2004.
[30]A. Bessemoulin, J. Dishong, G. Clark, D. White, P. Quentin, H. Thomas, and D. Geiger, “1-watt broad Ka-band ultra small high power amplifier MMIC’s using 0.25-?m GaAs PHEMTs,” IEEE Gallium Arsenide Integrated Circuit (GaAs IC) Symp. Dig., pp. 40–43, Oct. 2002.
[31]陳致宏, “微波存取全球互通頻段前向匯入式功率放大器與高效率Class F類功率放大器暨壓控震盪器電路之研製,” 中央大學, 碩士論文, 2007.
[32]呂紹良, “微波存取全球互通頻段變壓器耦合式功率放大器與電壓控制振盪器暨除頻器之研製,” 中央大學, 碩士論文, 2008.
[33]陳建中, “使用功率結合變壓器功率放大器與反E類開關式功率放大器研製,” 中央大學, 碩士論文, 2009.