利用高階除數操作之注入式鎖態振盪器於微波/毫米波訊號源應用

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研究生：	黃凡修 Fan-Hsiu Huang
論文名稱：	利用高階除數操作之注入式鎖態振盪器於微波/毫米波訊號源應用 Injection-Locked Oscillators with High-Order-Division Operation for Microwave/Millimeter-wave Signal Generation
指導教授：	詹益仁 Yi-Jen Chan
口試委員:
學位類別：	博士 Doctor
系所名稱：	資訊電機學院 - 電機工程學系 Department of Electrical Engineering
畢業學年度：	96
語文別：	英文
論文頁數：	105
中文關鍵詞：	注入式鎖態、微波/毫米波振盪器、鎖相迴路
外文關鍵詞：	injection-locked, microwave/millimeter-wave oscillator, phase-locked loop
相關次數：	點閱：18 下載：0
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微波/毫米波通訊系統近年來已廣泛的使用在行動通訊、光纖通訊及區域網路相關的應用上，為了系統中能擁有穩定低相位雜訊且低成本之信號源，注入式鎖態振盪器漸漸地被實際使用。在本論文中，我們探討注入式鎖態振盪器的基本原理，透過相關的注入式鎖態模型運用與推導來了解其鎖態機制、鎖態範圍、高階注入操作及相位雜訊等特性，利用這些原理來設計製作適合於微波或毫米波操作之高階注入鎖態振盪器。
使用基諧波、次諧波及高諧波注入方式，在本論文透過CMOS 及 GaAs pHEMT製程與高頻電晶體模型的模擬，設計出相關電路用以產生60 GHz振盪源與100 GHz除頻器，並實作出寬鎖態範圍、低相位雜訊及低功率耗損特性的注入式鎖態振盪器。此外，我們亦利用高階注入除數為4的除頻器來實作一30 GHz類比式鎖相迴路；在已知的基本迴路元件量測特性下，設計出整合式鎖相迴路積體電路，並實測出擁有低功率損耗及低相位雜訊等優良特性，以驗證注入式鎖態除頻器可應用於實際的鎖相迴路或頻率合成器。

In order to obtain a reference signal with a low phase noise, high frequency stability, and low cost for the microwave/millimeter-wave applications, the injection-locked oscillators have been widely used in the wireless, optics, and local network systems. In this thesis, the theory of injection locking is introduced to investigate the mechanism about the characteristics of the locking range, high-order harmonic injection, and the phase noise in injection-locked oscillator. With the injection-locked models, the behavior of injection locking is therefore understood for injection-locked oscillator designs.
Based on the methods of fundamental, sub-, and super-harmonic injections, the relative millimeter-wave injection locking circuits have been achieved and fabricated by using CMOS and GaAs pHEMT techniques. The 60 GHz injection-locked oscillators and the 100 GHz injection-locked frequency divider are fulfilled with the good performances of low phase noise, wide locking range, and low power consumption through the simulations with the high-frequency transistor model. In addition, a 30 GHz analogy phase-locked loop using a divided-by 4 ring-type injection-locked frequency divider has also been designed and achieved by using 0.5 μm E/D mode GaAs pHEMT. Utilizing the known experiment results from the each function circuits such as the voltage-controlled oscillator, phase detector, dc amplifier within a loop filter, the 30 GHz PLL was successfully integrated to be a MMIC for Ka-band communication systems. This circuit proves that the injection-locked frequency divider can embedded in the PLL chip with a fine characteristic.

Abstract
Figure captions
Table captions
Chapter 1  Introductions
Chapter 2  Characteristics of Injection-Locked Oscillators
1  Introduction of Injection Locking
2  Injection Locking Behavior
2.1  Super-harmonic Injection
2.2  Sub-harmonic Injection
3  Models of Injection-Locked Oscillator
4  Locking Range
5  Phase Noise
6  Summary
Chapter 3  High-Order Division Characteristic of Injection-Locked Frequency Divider
1  Introduction
2  High-Order Division Injection-Locked Oscillator
3  Ring-Type Injection-Locked Frequency Divider using E/D Mode pHEMT Technique
4  Summary
Chapter 4  Millimeter-wave Injection-Locked Oscillator Circuits
1  Introduction
2  V-Band CMOS Injection-Locked Oscillator using Fundamental Harmonic Injection
2.1  V-band CMOS Injection-Locked Oscillator Circuit Design
2.2  Measurement results
3  V-band GaAs pHEMT Cross-Coupled Sub-harmonic Oscillator
3.1  V-band Sub-harmonic Oscillator Circuit Description
3.2  Measurement Results
4  W-band Injection-Locked Frequency Divider using Cascode Circuit Topology
4.1  W-band Injection-Locked Frequency Divider Circuit Description
4.2  Measurement Results
5  Summary
Chapter 5  Design of Phase-Locked Loop Circuit using High-Order Harmonic Injection-Locked Frequency Divider
1  Introduction
2  Performance of Phase-Locked Loop
2.1  Loop Characteristics
2.2  Noise Characteristic
2.3  Working Range
2  Function Blocks of Integrated PLL
2.1  Voltage-Controlled Oscillator
2.2  Ring-Type Injection-Locked Frequency Divider
2.3  Phase Detector
2.4  DC Amplifier and Loop Filter
4  Simulation of Integrated Phase-Locked Loop
5  PLL Measurement Results
6  Summary
Chapter 6  Conclusions and Future Work
References
Publication List

                                

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