基於RFSoC平台的LEO衛星通訊時變通道模擬器的設計與實現

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研究生：	徐溥謙 Pu-Chien Hsu
論文名稱：	基於RFSoC平台的LEO衛星通訊時變通道模擬器的設計與實現 Design and Implementation of Time-Varying Channel Emulator for LEO Satellite Communications with RFSoC Platform
指導教授：	陳逸民 Yih-Ming Chen
口試委員:
學位類別：	碩士 Master
系所名稱：	資訊電機學院 - 通訊工程學系 Department of Communication Engineering
論文出版年：	2023
畢業學年度：	111
語文別：	中文
論文頁數：	103
中文關鍵詞：	軟體定義無線電
外文關鍵詞：	Time-Varing Channel
相關次數：	點閱：8 下載：0
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近年來，隨著衛星小型化及有效載荷系統不斷進步，以及低軌火箭運載成本的降低，使得衛星通訊除了軍事用途外，也開始快速朝向商業化發展。衛星
通訊擁有極高的覆蓋性、高資料傳輸率，以及傳輸較不易受天然災害影響，這些優勢讓低軌道衛星擁有了很好的商業價值。為了確保在未來地面接收站能接收衛星發射回來的訊號，我們做了一個低軌道衛星的通道模擬器，在衛星還沒上太空前先模擬太空中會產生的訊號延遲、頻率偏移及大氣環境的訊號衰減，未來地面站才能更加穩定收到我們的衛星訊號。
本論文在ZCU111之FPGA硬體架構設計與實現低軌道衛星的通道模擬，在FPGA上產生單載波訊號經過DAC/ADC收回來後，依照低軌道衛星的規格做時變延遲、相位變化以及訊號增益達到模擬衛星之訊號。本篇論文之硬體架構包含BlockRAM模組、Farrow Interpolator模組、相位旋轉模組、訊號增益模組以及RF Data Converter來實現低軌道衛星經過通道後的收發。

In recent years, with the continuous improvement of satellite miniaturization and payload system, as well as the reduction of the cost of low-orbit rockets, satellite communications have begun to rapidly develop towards commercialization in addition to military applications. Satellites have extremely high coverage, high data transmission rates, and transmissions are less susceptible to natural disasters. These advantages make low-orbit satellites have good commercial value. In order to ensure that the ground receiving station can receive the signal transmitted by the satellite in the future, we have made a low-orbit satellite channel simulator. Before the satellite goes into space, simulate the signal delay, frequency offset and signal attenuation of the atmospheric environment in space, so that the ground station can receive our satellite signal more stably in the future.
This thesis designs and realizes the channel simulation of low-orbit satellites on the FPGA hardware architecture of ZCU111. After the single-carrier signal is generated on the FPGA and retrieved by DAC/ADC, time-varying delay, phase change and signal gain are performed according to the specifications of low-orbit satellites. Reaching the signal of analog satellite. The hardware architecture of this paper includes BlockRAM module, Farrow Interpolator module, phase rotation module, signal gain module and RF Data Converter to realize the effect produced by low-orbit satellites.

謝誌    iv
目錄    v
圖目錄    viii
表目錄    xii
第一章    緒論    1
1-1     研究動機與背景    1
1-2  章節簡介    2
第二章    通道模擬器介紹    3
2-1  無線移動通道    4
2-2  衛星通訊通道    5
2-2-1  實際衛星信號延遲    6
2-2-2  實際衛星信號頻率偏移    7
2-2-3  實際衛星信號強度衰減    8
2-3  實驗情境    10
2-3-1  時變延遲    10
2-3-2  都普勒效應(Doppler Effect)    11
2-3-3  通道衰減    13
第三章 系統架構    15
3-1  RFSoC(射頻系統單晶片)    15
3-1-1  Processing System    16
3-1-2  Programming Logic    16
3-2  硬體平台    17
3-3  系統設計流程    18
第四章 低軌道通道模擬器硬體實現    20
4-1  系統架構    20
4-1-1 Config    21
4-1-2 Tx    22
4-2  通道模擬器    23
4-3  延遲(delay)    24
4-3-1  BRAM    25
4-3-2  費洛內插器(Farrow Interpolator)    26
4-3-3  Cubic Lagrange Interpolator    28
4-3-4  硬體架構    30
4-4  都普勒(doppler)    35
4-4-1  Coordinate Rotation Digital Computer    36
4-4-2  硬體架構    40
4-5  訊號增益    41
第五章 RFSoC平台之實現    44
5-1  Zynq UltraScale MPSoC (多處理器系統單晶片)    44
5-2  Direct Memory Access(DMA)    47
5-3     DAC/ADC    49
5-3-1  Clock    51
5-3-2  RFSoC Nyquist Zone Operation    54
5-3-3  DAC/ADC資料之擺放    55
5-3-4  DAC/ADC 操作介面    58
5-4  RFSoC平台使用流程    61
第六章 系統硬體實現結果    66
6-1   硬體資源使用率    66
6-2   硬體測試結果    69
6-2-1 訊號的延遲量測    69
6-2-2 訊號的頻譜量測    73
6-2-3 模組效能量測    76
第七章 結論    84
參考文獻    85


                                

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