單晶片測試機之前端驅動電路設計｜國立中央大學博碩士論文系統

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研究生：	余建朋 Jian-Pong Yu
論文名稱：	單晶片測試機之前端驅動電路設計
指導教授：	蘇朝琴 Chauchin Su
口試委員:
學位類別：	碩士 Master
系所名稱：	資訊電機學院 - 電機工程學系 Department of Electrical Engineering
畢業學年度：	89
語文別：	中文
論文頁數：	45
中文關鍵詞：	測試機、前端驅動電路、數位纇比轉換器、比較器、有限狀態機器
外文關鍵詞：	tester, PE circuit, DAC, comparator, FSM
相關次數：	點閱：14 下載：0
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Contents
Chapter 1 Introduction……………………………….……………...1
1 Motivations……………………………………………………………………..1
2 Pin Electronic Survey…………………………………………………………...4
3 Thesis Organization……………………………………………………………9
Chapter 2 Architesture of Pin Electronic card Circuit…………….10
1 Architecture Overview………………………………………………………...10
2 Driver…………………………………………………………………………..10
3 Dual Comparator………………………………………………………………13
4 Dynamic Load………………………………………………………………….16
5 Digital to Analog Converter (DAC)……………………………………………18
6 FSM…………………………………………….………………………………21
7 Sample and Hold………………………………………………………………..23
Chapter 3 Spec Requirement and Simulation Result………………25
1 Spec Requirement………………………….…………………………………...25
2 Driver………………..…………………………………………………………26
3 Comparator……………………………………………………………………..27
4 Load…………………………………………………………………………….30
5 DAC and S/H…………..……………………………………………………….32
6 Summary………………………………………………………………………..34
Chapter 4 Chip Implement…………….…………………………….35
1 Design Flow…………………………….………………………………………35
2 Chip implement…………..…………………... ………………….…………….37
3 Test result……………………………………………………………………….41
Chapter 5 Conclusion………………………………………..……….44
Reference………………………………………..……….…………...45

                                

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[5]Branson, C. “A high performance, 10-volt integrated pin electronics driver, “Test Conference, 1989. Proceedings. Meeting the Tests of Time., International , 1989.
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[7]Yungseon Eo; Eisenstadt, W.R.; Ju Young Jeong; Oh-Kyong Kwon, “New simultaneous switching noise analysis and modeling for high-speed and high-density CMOS IC package design, “Advanced Packaging, IEEE Transactions on [see also Components, Packaging and Manufacturing Technology, Part B: Advanced Packaging, IEEE Transactions on] , Volume: 23 Issue: 2 , May 2000.
[8]Wei-Shang Chu; Current, K.W. “A rail-to-rail input-range CMOS voltage comparator, “Circuits and Systems, 1997. Proceedings of the 40th Midwest Symposium on , Volume: 1 , 1998.
[9]Mandal, P.; Visvanathan, V. “ Macromodeling of the AC characteristics of CMOS op-amps, “Computer-Aided Design, 1993. ICCAD-93. Digest of Technical Papers., 1993 IEEE/ACM International Conference on , 1993.
[10]Senthinathan, R.; Prince, J.L. “Application specific CMOS output driver circuit design techniques to reduce simultaneous switching noise, “Solid-State Circuits, IEEE Journal of , Volume: 28 Issue: 12 , Dec. 1993.
[11]Liang Dai; Harjani, R. “CMOS switched-op-amp-based sample-and-hold circuit, “Solid-State Circuits, IEEE Journal of , Volume: 35 Issue: 1 , Jan. 2000.
[12]Palumbo, G.; Pennisi, S. “A class AB CMOS current mirror with low-voltage capability, “Electronics, Circuits and Systems, 1999. Proceedings of ICECS ''99. The 6th IEEE International Conference on , Volume: 2 , 1999.

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