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研究生: 蔣以約
Yi-Yue Chiang
論文名稱: 以(100)矽基板上的氮化硼研製P型異質場效電晶體
Fabrication of P-Channel Heterostructure Field Effect Transistors with the Boron Nitride Grown on Si(100) Substrates
指導教授: 賴昆佑
Kun-Yu Lai
口試委員:
學位類別: 碩士
Master
系所名稱: 理學院 - 光電科學與工程學系
Department of Optics and Photonics
論文出版年: 2025
畢業學年度: 113
語文別: 中文
論文頁數: 64
中文關鍵詞: 高電子遷移率電晶體遷移率電晶體二維電洞氣霍爾量測
外文關鍵詞: HFET, HEMT, p-channel, 2DHG, hall measurement
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  • 本論文探討氮化硼(boron nitride, BN)成長於矽(Si)基板上的異質結構特性,並嘗試以此磊晶結構所形成的二維電洞氣(two-dimensional hole gas, 2DHG),研製P型異質場效電晶體。
    在實驗部分,我們使用金屬有機化學氣相沉積法(metal-organic chemical vapor deposition, MOCVD)於 Si(100) 基板上成長 BN 薄膜,形成BN/Si 異質結構。藉由低溫霍爾量測,我們發現BN/Si介面在 13 K 至 300 K 溫度範圍內,有極高的電洞濃度,穩定維持在 1.7~2.0 × 1015 cm−2,遷移率則介於 48~54 cm2/V⋅s,不會隨著溫度改變,呈現明顯的2DHG特性,與常見的摻雜(acceptor-doped)電洞不同。
    為驗證此結構於元件上的應用潛力,我們製作具閘極控制之 P-channel 高電子遷移率電晶體(Heterostructure Field Effect Transistors, HFET),並進行直流電性量測。元件展現常開(depletion-mode)特性,且具備初步的閘極調變能力,顯示出 BN on Si 結構具備場效應控制特性,有機會應用在寬能隙 CMOS 邏輯電路。


    This study aims to fabricate a p-channel heterostructure field effect transistor (HFET) with the boron nitride (BN) grown on Si(100) substrates. The BN layer was deposited on a Si (100) substrate using metal-organic chemical vapor deposition (MOCVD). According to the results of low-temperature Hall measurements (13K ~ 300K), the BN/Si interface delivered a stable hole density at 1.7~2.0 × 1015 cm−2, and hole mobility at 48~54 cm2/V⋅s, showing the two-dimensional hole gas (2DHG) behavior. The result is not attainable with the holes by acceptor doping, which exhibiting strong temperature dependence.
    To explore the possibility in device applications, the BN-based p-channel HFETs were fabricated and characterized by DC measurements. The device exhibited the depletion-mode characteristics and demonstrated limited gate modulation capability. The result indicates that the 2DHG at BN/Si can be controlled by gate voltage, showing a potential for wide-bandgap CMOS logic circuits.

    摘要 i Abstract ii 誌謝 iii 目錄 iv 圖目錄 vi 表目錄 viii 名詞解釋 ix 第1章 緒論 1 1.1 P-channel HFEF的研究現況 (二維電洞氣於HEMT的應用) 1 1.1.1 發展 P-channel HFET 的重要性 1 1.1.2 傳統有極化效應的2DHG於P-channel HFET中的形成機制 2 1.2 BN on Si 的優勢 4 1.3 研究動機與論文架構 6 第2章 實驗方法、製成步驟與儀器 7 2.1 實驗結構 7 2.2.1 塗佈機 8 2.2.2 Karlsuss Mask Aligner(MA6 曝光機) 9 2.2.3 E-gun/Thermal Evaporator(電子束/熱阻式蒸鍍機) 10 2.2.5 ARTs-RTA(快速熱退火) 12 2.2.6 Furnace(爐管) 13 2.2.7 UV-Ozone Stripper(紫外外臭氧清洗機) 13 2.2.8 RIE(活性離子電漿蝕刻系統) 15 2.2.9 SAMCO PECVD (電漿輔助化學氣相沉積系統) 16 2.3 量測儀器 17 2.3.1 光學顯微鏡 17 2.3.3 Alpha Step® Profiler (表面輪廓儀) 20 2.3.4 B1500A 半導體元件參數分析儀 20 2.4 製成前霍爾量測 21 2.5.1 清潔樣品 24 2.5.2 定義Alignment(光阻旋塗、曝光及蝕刻) 24 2.5.3 定義MESA (光阻旋塗、曝光、蝕刻及蒸鍍) 25 2.5.4 製作Source and Drain(光阻旋塗、曝光及蒸鍍) 27 2.5.5 製作Gate(光阻旋塗、曝光及蒸鍍) 29 2.5.6 製作絕緣層 (光阻旋塗、曝光、蝕刻及蒸鍍) 30 2.5.7 製作Probe Pad(光阻旋塗、曝光及蒸鍍) 31 第3章 量測結果分析與討論 33 3.1 BN蝕刻率 33 3.2 低溫霍爾分析80loop 35 3.3 TLM 37 3.4 不同退火溫度條件下的IV曲線 42 3.5 電晶體直流特性分析 44 第4章 結論與未來展望 48 4.1 結論 48 4.2 未來展望 48 第5章 參考文獻 50

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