| 研究生: |
蘇翊凱 Yi-Kai Su |
|---|---|
| 論文名稱: |
二維無接面雙閘極場效電晶體之空乏特性探討 Depletion Characteristics Investigation of 2D Junctionless Double-Gate MOSFETs |
| 指導教授: |
蔡曜聰
Yao-Tsung Tsai |
| 口試委員: | |
| 學位類別: |
碩士 Master |
| 系所名稱: |
資訊電機學院 - 電機工程學系 Department of Electrical Engineering |
| 論文出版年: | 2013 |
| 畢業學年度: | 101 |
| 語文別: | 中文 |
| 論文頁數: | 43 |
| 中文關鍵詞: | 無接面 、無接面場效電晶體 、無接面雙閘極場效電晶體 |
| 外文關鍵詞: | Junctionless, Junctionless MOSFETs, Junctionless Double-Gate MOSFETs |
| 相關次數: | 點閱:9 下載:0 |
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在本篇論文中,首先先介紹無接面雙閘極場效電晶體的優點,我們以二維空間概念建立了完整的元件模型,並利用元件的能帶觀念導入主題。當元件所外加的閘極電壓不同時,元件會產生什麼樣的反應,若閘極電壓過大,則元件通道內會產生聚集現象,與傳統場效電晶體的反轉現象是不同的,因此我們做了一番的比較。同時也使用半導體物理觀念推導出臨限電壓公式,再由臨限電壓公式推導出空乏層大小,且使用兩種簡化方法推導出近似的電流方程式,然後都加以模擬比較,驗證其公式的精準度。並探討元件通道內的電荷分佈,著重於當元件在聚集現象時,若輸入汲極電壓產生電流,聚集電荷是否會明顯地影響電流值。
In this thesis, at first we introduce the advantages of junctionless double-gate MOSFET. We establish two-dimensional device model for numerical simulation, and use the energy band diagram to study the device. When the applied gate voltage increases for an n-channel device, the n-channel will be in forward bias. When the gate voltage is too large, the n-channel will be in accumulation mode. It is different from the traditional MOSFET’s which is operated in inversion mode for a large gate bias. We make some comparison between these two MOSFET’s. Furthermore, we also derive the threshold voltage by using semiconductor physics, then use the threshold voltage to derive the depletion layer’s thickness, and find two simplified methods to derive the approximate drain current. Finally, we compare the current equations with the result obtained from 2D numerical simulation to verify the accuracy. We study the charge distribution in the device channel, and focus on the accumulation charge effect to the drain current.
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