本論文主要針對在高阻值矽(111)基板上進行氮化鋁/氮化鋁鎵/氮化鋁/氮化鎵電晶體製作與研究，希望藉由以後製程氧化表面氮化鋁，使隨後沉積的閘極絕緣層能具有更好的品質。
本論文使用的閘極絕緣層材料為二氧化矽，而氧化表面製程採用氮氣與氧氣的混合氣體在溫度為900°C持續150秒，加上薄膜氧化層之熱退火，進而改善了金氧半接面的漏電流、降低接面缺陷密度。在經過氧化表面和薄膜氧化層之熱退火所製程之金氧半接面，其閘極漏電流為10-5 A/cm2相較於蕭特基閘極場效電體降低了約為五個數量級，且相較於未經高溫氧化製程的金氧半接面低約二個數量級；然而在接面缺陷密度的表現上，經氧化製程的金氧半接面的缺陷密度較高，估計是氧化製程導致表層氮化鋁/氮化鋁鎵接面品質劣化所致。
更進一步的將此製程技術應用至金氧半場效電晶體的製作上，並針對蕭特基閘極場效電晶體與金氧半場效電晶體的動態導通電阻的進行量測分析，結果發現，相較於蕭基特場效電晶體，金氧半場效電晶體可獲得較低的動態電阻/穩態導通電阻比值，然而在經過氧化表面後的元件，在高電場下動態特性的劣化將較未經氧化的元件嚴重，此結果亦說明當元件承受高電場時，介面缺陷密度對元件的影響甚劇。

This study focuses on the fabrication and characterization of AlN/AlGaN/AlN/GaN HEMTs on high-resistivity Si（111）substrate. The thermal oxidation is proposed before gate dielectric deposition to achieve the high quality gate dielectric and lower interface state density.
To fabricate metal-oxide-semiconductor high-electron-mobility-transistors (HEMTs), SiO2 gate dielectrics with thermal oxidation process was used in this study. The thermal oxidation process was using N2/O2 at 900 C for 150 sec before the gate dielectrics deposition. After SiO2 deposition, devices with post-deposition annealing（in N2 ambient at 1000 C）was investigated. MOS capacitor fabricated with and without thermal oxidation were investigated and compared. The MOS capacitor with thermal oxidation showed the gate leakage current of 10-5 A/cm2, which is lower than the device without thermal oxidation by twofold. However, the interface state density showed higher value in the device with thermal oxidation, the possible reason is the interface between AlN and AlGaN was damaged after thermal oxidation.
In addition, dynamic resistances of the Schottky-gate HEMTs and metal-oxide-semiconductor HEMTs were analyzed. The experimental results showed that metal-oxide-semiconductor HEMTs demonstrated lower dynamic on-resistance to steady-state on-resistance ratio. However, the device with thermal oxidation showed higher dynamic resistance to steady-state resistance ratio than the device without thermal oxidation at high electric field. This results revealed the interface state density would dominate at high electric field. Moreover, the temperature dependence of the threshold voltage and the correlation with the interface state density were discussed.

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