跳到主要內容

簡易檢索 / 詳目顯示

研究生: 邱韋豪
Chiu-Wei Hao
論文名稱: 由邊線向量求四面體的內部向量及其在三維半導體元件模擬之應用
Finding internal vector from the edge vector in arbitrary tetrehedron element for 3D semiconductor Device Simulation
指導教授: 蔡曜聰
Yao-Tsung Tsai
口試委員:
學位類別: 碩士
Master
系所名稱: 資訊電機學院 - 電機工程學系
Department of Electrical Engineering
論文出版年: 2017
畢業學年度: 105
語文別: 中文
論文頁數: 51
中文關鍵詞: 邊線向量四面體
外文關鍵詞: internal vector, tetrehedron element
相關次數: 點閱:7下載:0
分享至:
查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報
  • 本篇論文中主要使用C語言,設計一套四面體的網格來模擬元件的特性,根據分

    析後,我們選擇使用重心來開發模組,因為重心法可以適用任意四面體,首先使用邊

    線向量的方法來求得核心方程式所需要的參數,接著驗證電場、電子流密度、電洞流

    密度的正確性,最後將四面體組合成立方體應用在N型矽半導體、P-N二極體、球座

    標的球座標網格應用,並且將這些應用做理論的推導與程式模擬的結果作比較分析,

    所有的模擬結果皆證實此四面體網格的廣泛性及可靠度。


    In this thesis, we use C++ language to develop a tetrahedron element for 3-D device simulation. Barycenter method can be applied to arbitrary tetrahedron, and we use the edge vector to obtain the parameters needed by the core equation, and verify the electric field, current density and hole current density. Finally, the tetrahedrons are combined into cube applied to the N-type silicon semiconductors, PN diodes, and the spherical coordinate. In addition, these applications are used for theoretical derivation and compared with the program simulation. All the simulation results confirm the reliability of this tetrahedron mesh.

    摘要 i Abstract ii 目錄 iii 圖目錄 iv 表目錄 vi 第一章 簡介 1 第二章 三維四面體網格與等效電路模型分析.........3 2-1. 立方體網格結構與分析...................3 2-2. 外心在四面體網格出現的問題..............7 2-3. 重心在四面體網格之分析..................8 2-4 邊線電場求其內部電場....................8 第三章 三維半導體元件特性模擬與驗證.............18 3-1. 四面體模組電場驗證.....................18 3-2. 四面體模組電子流密度與電洞流密度驗證.....22 3-3. 立方體簡單電阻模擬分析..................29 3-4. 四面體模組的二極體之模擬分析.............32 第四章 三維四面體網格球座標之應用................34 4-1. R方向電阻推導與驗證.....................34 4-2. θ方向電阻推導與驗證.....................36 4-3. φ方向電阻推導與驗證.....................39 第五章 結論....................................41 參考文獻 ........................................42

    [1] Akiyama, Yutaka. "Triangle and tetrahedron mesh generation method." U.S. Patent No. 5,774,696. 30 Jun. 1998.D. A. Neamen, Semiconductor physics and devices, 3rd ed., McGraw-Hill Companies Inc., New York, 2003.
    [3] S. Micheletti, “Stabilized finite elements for semiconductor device simulation,” Comput & Visual Sci., vol. 3, pp. 177-183, 2001.
    [4] J. M. Park, “Novel Power Devices for Smart Power Applications”, Ph.D. Dissertation, Technischen Universität Wien, 2004
    [5] H. Kaur, S. Kabra, S. Bindra, S. Haldar, and R. S. Gupta, “'Impact of Graded Channel (Gc) Design in Fully Depleted Cylindrical/Surrounding Gate Mosfet (Fd Cgt/Sgt) for Improved Short Channel Immunity and Hot Carrier Reliability”, Solid-State Electronics, Vol. 51, pp.398-404, 2007.
    [6] J. H. Seo, Y. J. Yoon, S. Lee, J. H. Lee, S. Cho, and I. M. Kang, “Design and Analysis of Si-Based Arch-Shaped Gate-All-around (Gaa) Tunneling Field-Effect Transistor (Tfet)”, Current Applied Physics, Vol. 15, pp.208-212, 2015
    [7] K. Gopalakrishnan, P. B. Griffin and J. D. Plummer, “Impact Ionization Mos (I-Mos)-Part I: Device and Circuit Simulations”, IEEE Trans. on Electron Devices, Vol. 52, pp.69-76, 2005
    [8] K. Marc. "Bonding bands, lone-pair bands, and impurity states in chalcogenide
    semiconductors." Physical Review Letters 28.6 1972
    [9] Chadi, D. J., R. M. White, and W. A. Harrison. "Theory of the magnetic susceptibility of tetrahedral semiconductors." Physical Review Letters 35.20 1975
    [10] C. C. Chang, “Improvement of 2-D and 3-D Semiconductor Device Simulation Using Equivalent-circuit Model”, Ph.D. Dissertation, Institute of EE, National Central University, Taiwan, Republic of China, Jun. 2006
    [11] C. C. Chang, C. H. Huang, J. F. Dai, S. J. Li, and Y. T. Tsai, “3-D Numerical Device Simulation Including Equivalent-Circuit Model”, IEDMS, 2002.
    [12] Bank, Randolph E., Donald J. Rose, and Wolfgang Fichtner. "Numerical methods for semiconductor device simulation." SIAM Journal on Scientific and Statistical Computing 4.3 , 416-435. 1983
    [13] Wood, D. M., Alex Zunger, and R. De Groot. "Electronic structure of filled tetrahedral semiconductors." Physical Review B 31.4 1985
    [14] C. H. Lee, “Development of 3D Trapezoidal Model and its Application to Semiconductor Device Simulation,”M. S. Thesis, Institute of EE, Nation Central University, Taiwan, Republic of China, 2015.
    [15] Hitschfeld, Nancy, Paolo Conti, and Wolfgang Fichtner. "Mixed element trees: a generalization of modified octrees for the generation of meshes for the simulation of complex 3-D semiconductor device structures." IEEE transactions on computer-aided design of integrated circuits and systems 12.11 1993
    [16] Mock, M. S. "Analysis of a discretization algorithm for stationary continuity equations in semiconductor device models, II." COMPEL-The international journal for computation and mathematics in electrical and electronic engineering 3.3 137-149 1984

    QR CODE
    :::