| 研究生: |
王兆玄 Jhao-Syuan Wang |
|---|---|
| 論文名稱: |
基於多尺度注意力、可變形卷積與深度可分離卷積的晶圓缺陷辨識模型 An Integrated Model for Wafer Defect Pattern Recognition Based on Multi-Scale Attention ,Deformable Convolution and Depth-wise Separable Convolution |
| 指導教授: |
葉英傑
Ying-Chieh Yeh |
| 口試委員: | |
| 學位類別: |
碩士 Master |
| 系所名稱: |
管理學院 - 工業管理研究所 Graduate Institute of Industrial Management |
| 論文出版年: | 2024 |
| 畢業學年度: | 112 |
| 語文別: | 中文 |
| 論文頁數: | 40 |
| 中文關鍵詞: | 晶圓缺陷辨識 、卷積神經網路 、注意力機制 |
| 外文關鍵詞: | wafer defect recognition, multi-scale attention, convolution neural network |
| 相關次數: | 點閱:15 下載:0 |
| 分享至: |
| 查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報 |
本研究針對半導體製造中晶圓缺陷檢測這一關鍵問題展開探討。隨著電路積
體密度的增加和晶圓設計複雜性的增加,晶圓缺陷變得更加普遍。每個晶圓缺陷的發生都是源於某些製造流程的特定異常行為,一套識別晶圓缺陷的系統,有助於發現半導體製造中的異常製程並採取相應措施加以解決。在半導體製造流程中,準確檢測並識別晶圓上的各種缺陷至關重要,但傳統基於卷積神經網絡(CNN)的方法存在一些固有的缺陷,例如高計算量、過擬合和對特定型態缺陷的處理不足。因此,本研究旨在提出一種新型的卷積神經網絡,將深度可分離卷積、多尺度注意力和可變形卷積等技術結合,以提升模型效率、改善缺陷處理能力並增強模型泛化能力。透過這些方法的綜合應用,我們期望能夠有效解決晶圓缺陷檢測中的挑戰,提高檢測準確性和效率,從而促進半導體製造流程的持續優化與提升。
This study focuses on the crucial issue of wafer defect detection in semiconductor manufacturing. With the increase in circuit integration density and the complexity of wafer design, wafer defects have become more prevalent. Each wafer defect originates from specific abnormal behaviors in the manufacturing process. Accurate detection and identification of various defects on wafers are essential in semiconductor manufacturing. However, traditional convolutional neural network (CNN)-based methods suffer from inherent drawbacks such as high computational complexity, overfitting, and inadequate handling of specific types of defects. Therefore, this study aims to propose a novel convolutional neural network that integrates techniques such as depth-wise separable convolution, multi-scale attention, and deformable convolution to improve model efficiency, enhance defect processing capabilities, and strengthen model generalization ability. Through the comprehensive application of these methods, we expect to effectively address the challenges in wafer defect detection, enhance detection accuracy and efficiency, and promote continuous optimization and improvement of semiconductor manufacturing processes.
[1] Cheon, S., H. Lee, C. O. Kim, & S. H. Lee "Convolutional neural network for wafer surface defect classification and the detection of unknown defect class." IEEE Transactions on Semiconductor Manufacturing 32.2 ,2019,163-170.
[2] Chollet, F. "Xception: Deep learning with depthwise separable convolutions."Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition. 2017, 1251-1258.
[3] Dai, J., H. Qi, Y. Xiong, Y. Li, G. Zhang, H. Hu, & Y. Wei "Deformableconvolutional networks." Proceedings of the IEEE International Conference on Computer Vision. 2017, 764-773.
[4] He, K., X. Zhang, S. Ren, & J. Sun "Deep residual learning for image recognition."Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition.
2016, 770-778.
[5] Howard, A. G., M. Zhu, B. Chen, D. Kalenichenko, W. Wang, T. Weyand, M. Andreetto, & H. Adam. "Mobilenets: Efficient convolutional neural networks for mobile vision applications." arXiv preprint arXiv:1704.04861 ,2017.
[6] Hu, J., L. Shen, & G. Sun. "Squeeze-and-excitation networks." Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition. 2018, 7132-7141.
[7] Jaderberg, M., K. Simonyan & A. Zisserman. "Spatial transformer networks."Advances in Neural Information Processing Systems 28 ,2015.
[8] Jin, C. H., H. J. Na, M. Piao, G. Pok, & K. H. Ryu. "A novel DBSCAN-based defect pattern detection and classification framework for wafer bin map." IEEE
Transactions on Semiconductor Manufacturing 32.3 ,2019,286-292.
[9] Krizhevsky, A., I. Sutskever, & G. E. Hinton. "Imagenet classification with deep convolutional neural networks." Advances in Neural Information Processing Systems 25 ,2012.
[10] Piao, M. C. H. Jin, J. Y. Lee, & J. Y. Byun. "Decision tree ensemble-based wafer map failure pattern recognition based on radon transform-based features." IEEE
Transactions on Semiconductor Manufacturing 31.2 ,2018, 250-257.
[11] Saqlain, M., Q. Abbas, & J. Y. Lee. "A deep convolutional neural network for wafer defect identification on an imbalanced dataset in semiconductor manufacturing
processes." IEEE Transactions on Semiconductor Manufacturing 33.3 ,2020,436-444.
[12] Saqlain, M., B. Jargalsaikhan, & J. Y.Lee. "A voting ensemble classifier for wafermap defect patterns identification in semiconductor manufacturing." IEEE
Transactions on Semiconductor Manufacturing 32.2 ,2019, 171-182.
[13] Simonyan, K., & A. Zisserman. (2014). "Very deep convolutional networks for large-scale image recognition." arXiv preprint arXiv:1409.1556 ,2014.
[14] Wang, J., C. Xu, Z. Yang, J. Zhang, & X. Li. "Deformable convolutional networks for efficient mixed-type wafer defect pattern recognition." IEEE Transactions on
Semiconductor Manufacturing 33.4 ,2020, 587-596.
[15] Wang, J., Z. Yang, J. Zhang, Q. Zhang, & W. T. K. Chien. "AdaBalGAN: An improved generative adversarial network with imbalanced learning for wafer defective pattern recognition." IEEE Transactions on Semiconductor Manufacturing 32.3 ,2019, 310-319.
[16] Wei, Y., & H. Wang. "Mixed-type wafer defect recognition with multi-scale information fusion transformer." IEEE Transactions on Semiconductor
Manufacturing 35.2 ,2022, 341-352.
[17] Woo, S., J. Park, J. Y. Lee, & I. S. Kweon "Cbam: Convolutional block attention module." Proceedings of the European Conference on Computer Vision (ECCV), 2018, 3-19.
[18] Wu, M. J., J. S. R. Jang, & J. L. Chen. "Wafer map failure pattern recognition and similarity ranking for large-scale data sets." IEEE Transactions on Semiconductor
Manufacturing 28.1 ,2014, 1-12.
[19] Zhang, X., & X. Wang. "Marn: multi-scale attention retinex network for low-light image enhancement." IEEE Access 9 ,2021, 50939-50948.
[20] Zhu, X., H. Hu, S. Lin, & J. Dai "Deformable convnets v2: More deformable, better results." Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition. 2019, 9308-9316.