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| 研究生： |
李佳翰 Chia-Han Lee |
|---|---|
| 論文名稱： |
立體梯形模型於三維半導體元件模擬之開發與應用 Development of 3D Trapezoidal Model and its Application to Semiconductor Device Simulation |
| 指導教授： |
蔡曜聰
Yao-Tsung Tsai |
| 口試委員: | |
| 學位類別： |
碩士 Master |
| 系所名稱： |
資訊電機學院 - 電機工程學系 Department of Electrical Engineering |
| 論文出版年： | 2015 |
| 畢業學年度： | 103 |
| 語文別： | 中文 |
| 論文頁數： | 52 |
| 中文關鍵詞： | 半導體 、模擬 、二極體 、環繞式電晶體 、梯形 |
| 外文關鍵詞： | Semiconductor, Simulation, Diode, GAA MOSFET, Trapezoid |
| 相關次數： | 點閱：15 下載：0 |
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本篇論文中主要使用C語言，建立一套基於球體座標系統的三維梯形網格來模擬元件的特性，並在程式裡加入離子撞擊游離模型，可用來觀察不同球狀接面的崩潰電壓與電流。將梯形網格建立完畢後，首先要定義如何找出外心來分割網格，以利於後續求出電流通過的截面積與體積，並推導三種方向的電阻公式，再與模擬結果做比較即可得知網格是否設計正確。最後除了球體二極體元件以外，也將網格應用在圓柱和直角這兩種座標系統，分別模擬環繞式電晶體電容與矩形PN二極體，在輸入方式上則新增GPS座標的定位方式，所有的模擬結果皆證實了此系統應用的廣泛性和可靠度。
In this thesis, we have successfully developed a three-dimensional trapezoidal model written in C and based on spherical coordinates for device simulation. We can also observe both breakdown voltage and breakdown current happened in spherical curvature with impact-ionization model added into this equivalent circuit. As the first step in our analysis, we will provide a detailed explanation to define circumcenters of a trapezoid. In order to ensure that our software is reliable and the model is correct, it’s necessary to derive three kinds of resistance formulas and then compare those with simulation results. The data summarized indicate strong relationship between theory and simulation. In addition, it is important to emphasize that this trapezoidal model not only can be applied to spherical PN diode but also can be applied to cylindrical Gate-All-Around MOS capacitor and rectangular PN diode. Moreover, we introduce GPS coordinates into our program, making it more flexible and easy to use. These results lead us to the conclusion that the beauty of our program is its universality and reliability.
[1] D. A. Neamen, Semiconductor physics and devices, 3rd ed., McGraw-Hill Companies Inc., New York, 2003.
[2] C. C. Chang, “Improvement of 2-D and 3-D Semiconductor Device Simulation Using Equivalent-circuit Model”, Ph.D. Dissertation, Institute of EE, National Central University, Taiwan, Republic of China, Jun. 2006.
[3] C. C. Chang, C. H. Huang, J. F. Dai, S. J. Li, and Y. T. Tsai, “3-D Numerical Device Simulation Including Equivalent-Circuit Model”, IEDMS, 2002.
[4] P. N. Chen, “Breakdown simulation of spherical P-N junction with spherical coordinate system”, M.S. Thesis, Institute of EE, National Central University, Taiwan, Republic of China, Jun. 2013.
[5] J. M. Park, “Novel Power Devices for Smart Power Applications”, Ph.D. Dissertation, Technischen Universität Wien, 2004.
[6] K. Gopalakrishnan, P. B. Griffin and J. D. Plummer, “Impact Ionization Mos (I-Mos)-Part I: Device and Circuit Simulations”, IEEE Trans. on Electron Devices, Vol. 52, pp.69-76, 2005.
[7] P. C. Hsieh, “Impact-Ionization Parameter Extraction by PN Junction Simulation with a Decoupled or Coupled Method”, M.S. Thesis, Institute of EE, National Central University, Taiwan, Republic of China, Jun. 2012.
[8] H. C. Fang, “3D PN Diode Equation and Device Simulation with Spherical Junction”, M.S. Thesis, Institute of EE, National Central University, Taiwan, Republic of China, Jun. 2012.
[9] H. Kaur, S. Kabra, S. Bindra, S. Haldar, and R. S. Gupta, “'Impact of Graded Channel (Gc) Design in Fully Depleted Cylindrical/Surrounding Gate Mosfet (Fd Cgt/Sgt) for Improved Short Channel Immunity and Hot Carrier Reliability”, Solid-State Electronics, Vol. 51, pp.398-404, 2007.
[10] J. H. Seo, Y. J. Yoon, S. Lee, J. H. Lee, S. Cho, and I. M. Kang, “Design and Analysis of Si-Based Arch-Shaped Gate-All-around (Gaa) Tunneling Field-Effect Transistor (Tfet)”, Current Applied Physics, Vol. 15, pp.208-212, 2015.
