對混合訊號中的類比電路建立行為模型的方式能夠提升驗證的平台至系統層級，能有效的提升混合訊號晶片驗證時程，但如果能發展一個自動行為模型產生器，從電路規格或連線關係可以自動產生模塊所需的行為模型，並且在呈現整體類比電路行為時還維持住一定的精準度，就能大幅降低設計者在建立行為模型的工作時間。以往的行為模型大多是直接透過萃取輸入以及輸出訊號之間的關聯性來建立，這樣的建模方式雖然準確但是非常耗時。我們所建構的自動化行為模型產生器，會將大電路依據一些常用的電路模塊做切割，再從模型資料庫(model library)中尋找相對應的區塊行為模型代入，將電晶體層級的電路提升至行為層級做驗證。
以往迴歸式分析的方法需要透過大量的訓練樣本(training patterns)來校準區塊模型，因此，本論文提出一個非迴歸式自動化校準方法，可以校準行為模型產生器中的區塊模型，不需要訓練樣本就能有效提升準確度。如實驗結果所示，本論文提出的方法能夠有效維持住模組行為的精確度並提升自動模型產生器的效率。

Building the behavioral model for each analog circuit is an efficient approach for mixed-signal system verification. If an automatic model generator is available to generate the required behavioral model from the given circuit specifications or netlist, it is useful for designers to reduce the extra efforts.
Instead of modeling the relationship between circuit inputs and outputs directly, a divide and conquer approach is proposed in this paper to divide the circuit into several small building blocks and model the behavior of each block. It will increase the level of verification from transistor level to behavioral level. A different approach is proposed to build the behavioral model of each internal block in structure-based approach without regression. Therefore, no training patterns are required in the calibration process. As shown in the experimental results, the model accuracy is still kept in the proposed approach while the efficiency of behavioral model generator is greatly improved

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