| 研究生: |
蔡志育 Jhih-Yo Tsai |
|---|---|
| 論文名稱: |
應用於數位視頻廣播系統中具自動校正機制的連續時間Tow-Thomas濾波器之設計 Design of Continuous-Time Tow-Thomas Filter with Auto-Tuning Mechanism for DVB-T/H Receiver |
| 指導教授: |
薛木添
Muh-Tian Shiue 蘇純賢 Chun-Hsien Su |
| 口試委員: | |
| 學位類別: |
碩士 Master |
| 系所名稱: |
資訊電機學院 - 電機工程學系 Department of Electrical Engineering |
| 畢業學年度: | 97 |
| 語文別: | 中文 |
| 論文頁數: | 85 |
| 中文關鍵詞: | 自動校正機制 |
| 外文關鍵詞: | Auto-tuning |
| 相關次數: | 點閱:11 下載:0 |
| 分享至: |
| 查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報 |
本篇論文描述一個應用在歐規陸地/手持式數位視頻廣播系統(DVB-T/H)中基頻接收端通訊系統的類比前端電路(AFE)。 吾人使用一個足夠頻寬的全差動放大器於接收端內訊號路徑上構成一個4 MHz的六階Chebyshev低通濾波器。 顧及製程與溫度變動會使得濾波器參數偏移,吾人使用自動校正機制將濾波器之參數調整在我們所要的區間內。 吾人使用台灣積體電路公司(TSMC)所提供之0.18微米金氧半製程來進行設計驗證。 佈局後(post-layout)模擬結果顯示,本電路在操作電壓為1.8 V時,其動態增益有53dB,頻寬之校正誤差小於5%,導通帶漣波在2dB內,雙端輸入模擬出的總諧波失真(THD)小於-60dB,消耗功率為38.9毫瓦。
This thesis describes an analog font end (AFE) specifically designed for the DVB-T/H applications. A Chebyshev low-pass filter, which is with 4-MHz bandwidth and consists of a fully differential amplifier with sufficient bandwidth, has been developed and added in the signal path of the receiver. Considering the parameter offsets of the designed filter stemming from the process and temperature variations, an auto-tuning mechanism has been proposed to calibrate the parameters such as the central frequency and quality factor. Post-layout simulation results from the designed filter in a TSMC 0.18-μm CMOS process show that it has a dynamic range of 53 dB, calibration error of less than 5%, pass-band ripple of less than 2 dB, total harmonic distortion of less than 60 dB, and power consumption of 38.9 mW, under the nominal supply voltage of 1.8 V.
[1] European Telecommunications Standards Inst. (ETSI), ETSI EN 302 304 V1.1.1 (2004-11): Digital Video Broadcasting (DVB); Transmission System for handheld Terminals (DVB-H), 2004.
[2] C. Y. Kao, C. Y. Chen, “On Handheld DTV: An Introduction to DVB-H Technology”, CCL TECHNICAL JOURNAL, pp. 5-17, Dec. 2004.
[3] J. Crols and M. S. J. Steyaert, “Low-IF Topologies for High-Performance Analog Front Ends of Fully Integrated Receivers,” IEEE Transactions on Circuits and Systems-II: Analog and Digital Signal Processing, vol. 45, pp. 269-282, March 1998.
[4] B. Razavi, RF Microelectronics. Prentice-Hall, 1997.
[5] W. Namgoong and T. H. Meng, “Direct-Conversion RF Receiver Design,” IEEE Transactions on Communications, vol. 49, pp. 518-529, March 2001.
[6] K. P. Pun, J. E. Franca, C. Azeredo-Leme, C. F. Chan, and C. S. Choy, “Correction of frequency-dependent I/Q mismatches in quadrature receivers,” Electronics Letters, vol. 37, pp. 1415-1417, Nov. 2001.
[7] J. C. Huang, Automatic Gain Control and Continuous-Time Receive Filter in DVB-T/H Receiver Design, Master Thesis, National Central University, 2005.
[8] M. Valkama, M. Renfors, V. Koivunen, “Advanced methods for I/Q imbalance compensation in communication receivers,” IEEE Transactions on Signal Process, vol. 49, pp. 2335-2344, Oct. 2001.
[9] H. H. Chen, P. C. Huang, C. K. Wen and J. T. Chen, “Adaptive Compensation of Even-Order Distortion in Direct Conversion Receivers,” IEEE Transactions on Vehicular Technology, vol. 1, pp. 271-274, Oct. 2003.
[10] M. Dawkins, A. P. Burdett, N. Cowley, “A Single-Chip Tuner for DVB-T,” IEEE Journal of Solid-State Circuits, vol. 38, pp. 1307-1317, Aug. 2003.
[11] M. Dawkins, A. P. Burdett, N. Cowley, “Single-Chip Tuner design for digital terrestrial television,” Proc. IEEE International Symposium on Circuits and Systems, vol. 1, pp. 125-128, May. 2001.
[12] H. Darabi and A. Abidi, “A 4.5mW 900-MHz CMOS receiver for wireless paging,” IEEE Journal of Solid-State Circuit, vol. 35, pp. 1085-1096, Aug. 2000.
[13] P. Antoin, P. Bauser, H. Beaulation, M. Buchholz, D. Carey, T. Cassagnes, T.K. Chan, S. Colomines, F. Hurley, D. T. Jobling, N. Kearney, A. C. Murphy, J. Rock, D. Salle, and C. T. Tu, “A Direct-Conversion Receiver for DVB-H,” IEEE Journal of Solid-State Circuits, vol. 40, pp. 2536-2546, Dec. 2005.
[14] P. E. Allen, D. R. Holberg, CMOS Analog Circuit Design. Oxford University Press, New York, 2002.
[15] S. Cha, H. Yang, S. Lee, S. Lee, J. Lim and J. Choi, “A 1.2V Wide-Band Active-RC Filter for Wireless Communication Receivers,” Proc. IEEE Region 10 Annual International Conference, pp. 1-4, Nov. 2006.
[16] C. H. Huang, RF Specification Test and Related Mixed-Signal IC Design in Bluetooth, Master Thesis, National Sun Yat-sen University, 2002.
[17] T. Instruments, “Analysis of the Sallen-Key Architecture,” July 1999 - Revised September 2002.
[18] M. E. Van Valkenburg, Analog Filter Design. Oxford University Press, New York, 1982.
[19] C. C. Lee, G. K. Ma, “A 1.8V 250MHz CMOS Programmable Gain Filter for Ultra-wideband Transmitter System,” IEEE International Conference on Electron Devices and Solid-State Circuits, pp. 229-232, Dec. 2005.
[20] R. Schaumann and M. A. Tan, “The Problem of On-Chip Automatic Tuning in Continuous-Time Integrated Filters,” Proc. IEEE ISCAS, vol. 1, pp. 106–109 , 1989,.
[21] J. I. Osa, A. Carlosena, and A. J. Lopez-Martin, “MOSFET-C Filter with On- Chip Tuning and Wide Programming Range,” IEEE Transactions on Circuits and System-II, vol. 48, no. 10, pp. 944–951, Oct. 2001.
[22] T. Salo, S. Lindfors, and K. Halonen, “Direct Digital Tuning for Continuous- Time Filters,” in IEEE Proc. MWSCAS, 2000, vol. 1, pp. 216–219.[24] A Lopez-Martinez, R. Antonio-Chavez, and J. Silva-Martinez, “A 150 MHz Continuous-Time Seventh Order 0.05◦ Equiripple Linear Phase Filter with Au- tomatic Tuning System,” Proc. IEEE ISCAS, vol. 1, pp. 156–159, 2001.
[23] A. Lopez-Martinez, R. Antonio-Chavez, and J. Silva-Martinez, “A 150 MHz Continuous-Time Seventh Order 0.05◦ Equiripple Linear Phase Filter with Au- tomatic Tuning System,” Proc. IEEE ISCAS, vol. 1, pp. 156–159, 2001.
[24] M. Chen, J. Silva-Martinez, S. Rokhsaz, and M. Robinson, “A 1.8V CMOS, 80- 200MHz Continuous-Time 4th Order 0.05◦ Equiripple Linear Phase Filter with Automatic Tuning System,” Proc. IEEE ISCAS, vol. 5, pp. 173–176, 2002.
[25] H. Khorramanabadi and P. R. Gray, “High-Frequency CMOS Continuous-Time Filters,” IEEE J. Solid-State Circuits, vol. SC-19, no. 12, pp. 939–948, Dec. 1984.
[26] H. Liu and A. I. Karsilayan, “A High-Frequency Bandpass Continuous-Time Filter with Automatic Frequency and Q-factor Tuning,” Proc. IEEE ISCAS, vol. 1, pp. 328–331, 2001.
[27] A. I. Karsilayan and R. Schaumann, “Mixed-Mode Automatic Tuning Scheme for High-Q Continuous-Time Filters,” Proc. IEEE Circuits, Devices and System, vol. 147, no. 1, pp. 57–64, 2000.
[28] D.A. Johns and K. Martin, Analog Integrated Circuit Design. John Wiley and Sons Inc., 1997.
[29] B. Razavi, Design of Analog CMOS Integrated Circuits. Mc Graw Hill, 2001.
[30] R. Schaumann, M. E. Van Valkenburg, Design of Analog Filters. Oxford University Press, 2001.
[31] B. K. Thandri and J. Silva-Martínez, “A Robust Feedforward Compensation Scheme for Multistage Operational Transconductance Amplifiers With No Miller Capacitors,“ Proc. IEEE Journal of Solid-State Circuits, vol. 38, No. 2, February 2003.
[32] M. M. Zhang, P. J. Hurst, “Effect of Nonlinearity in the CMFB Circuit that Uses the Differential-Difference Amplifier,” IEEE International Symposium on Circuits and Systems, pp. 1390-1393, May. 2006.
[33] M.W. L. Cunha, S. Noceti Filho, M.C. Schneider, and A. L. Dalcastagne, “Automatic Tuning of MOSFET-C Filters Using Digitally Programmable Current Attenuators,” IEEE Intemational Symposium on Circuits and Systems, June 9-12,1997.
[34] S. Y. Ho, “Digitally Controlled AGC with Programmable-Gain Filter for DVB-T/H,” Master Thesis, National Central University, 2006.
[35] T. H. Teo, E. S. Khoo, Dasgupta Uday, “Fifth Order Low-pass Transitional Gm-C Filter with Relaxation Oscillator Frequency Tuning Circuit,” 16-18 Dec. 2003