本論文利用tsmc 0.18um 1P6M CMOS製程設計功率放大器，設計了兩個功率放大器，首先第一個電路設計在2.4 GHz，為一單級的功率放大器，藉由變壓器結合功率，以達成高輸出功率的目標。第二個電路同樣設計在2.4 GHz，也同樣是單級的功率放大器，設計反F類功率放大器，藉由諧波處理來增進效率，達成高效率的目標。
各電路特性量測如下：使用變壓器結合功率之功率放大器，增益為12.2 dB，S11為-12.0 dB，S22為-13.0 dB，輸出功率1-dB增益壓縮點為25.7 dBm，飽和輸出功率為27.1 dBm，輸出功率1-dB增益壓縮點效率為14.3 %，最大效率為14.7 %，同時，藉由本次的電流耐流量考量以及power cells的設計方式，可以提升電路特性，並且有很高的耐流量，量測到直流電流達到1.2 A，且電路安全無虞，並且此最大電流是在國家晶片中心(CIC)進行量測，已經將輸入訊號調至最大的狀態之下，因此估計應可有更大的耐流量；反F類功率放大器，增益為8.7 dB，S11為-16.4 dB，S22為-16.8 dB，輸出功率1-dB增益壓縮點為19.7 dBm，飽和輸出功率為21.1 dBm，輸出功率1-dB增益壓縮點效率為31.3 %，最大效率為31.3 %。

This thesis presents CMOS power amplifier (PA) implemented in 0.18um CMOS technology. The implemented circuits include two PA circuits. The first power amplifier is targeted for high output power. The power amplifier using power-combining transformer is presented. The second power amplifier is targeted for high-efficiency which power amplifier is based on the inverse class F technique.
The measured results are summarized as below: the PA with power-combining transformer technique achieves a power gain of 12.2 dB with input and output return losses of 12.0 dB and 13.0 dB, a 1-dB gain compression point (P1dB) of 25.7 dBm, a maximum output power of 27.1 dBm, a power added efficiency (PAE) at P1dB of 14.3 %, a maximum PAE of 14.7 %. The PA with inverse class F achieves a power gain of 8.7 dB with input and output return losses of 16.4 dB, and 16.8 dB, a P1dB of 19.7 dBm, a maximum output power of 21.1 dBm, a PAE at P1dB of 31.3 %, a maximum PAE of 31.3 %.

[1] K. H. An, O. Lee, H. Kim, D. H. Lee, J. Han, K. S. Yang, Y. Kim, J. J. Chang, W. Woo, C. H. Lee, H. Kim, and J. Laskar, “Power-combining transformer techniques for fully-integrated CMOS Power Amplifiers,” IEEE J. Solid-State Circuits, vol.43, no.5, pp.1064-1075, May 2008.
[2] Y. Y. Woo, Y. Yang, I. Kim, and B. Kim, “Student design efficiency comparison between highly efficient Class-F and inverse Class-F power amplifiers,” IEEE Microwave Magazine , vol.8, no.3, pp.100-110, June 2007.
[3] F. Giannini and L. Scucchia, “A complete class of harmonic matching networks: synthesis and application,” IEEE Trans. Microwave Theory Tech., vol.57, no.3, pp.612-619, March 2009.
[4] P. Reynaert and A. M. Niknejad, “Power combining techniques for RF and mm-wave CMOS power amplifiers,” European Solid State Circuits Conference, vol., no., pp.272-275, 11-13 Sept. 2007.
[5] J. Choi, S. Kim and C. Seo, “High-efficiency power amplifier using in/output matching network based on novel harmonic control circuit,” Asia-Pacific Microwave Conference, vol., no., pp.1-4, 16-20 Dec. 2008.
[6] J. Y. Kim, D. S. Oh, and J. H. Kim, “Design of a harmonically tuned class-F power amplifier,” Asia-Pacific Microwave Conference, vol., no., pp.1-4, 11-14 Dec. 2007.
[7] H. Y. Liao, J. H. Chen, H. K. Chiou, and S. M. Wang, “Harmonic control network for 2.6 GHz CMOS class-F power amplifier,” IEEE Circuits and Systems, vol., no., pp.1321-1324, 24-27 May 2009.
[8] Y. Y. Woo, Y. Yang, and B. Kim, “Analysis and experiments for high-efficiency class-F and inverse class-F power amplifiers,” IEEE Microwave Trans Theory Tech., vol.54, no.5, pp. 1969- 1974, May 2006.
[9] C. Lee and Y. Park, “Design of compact-sized class-F PA for wireless handset applications,“ IEEE MTT-S Int. Microw. Symp. Dig., vol., no., pp.405-408, 7-12 June 2009
[10] I. Aoki, S. D. Kee, D. B. Rutledge, and A. Hajimiri, “Fully integrated CMOS power amplifier design using the distributed active-transformer architecture,” IEEE J. Solid-State Circuits, vol. 37, no. 3, pp. 371–383, Mar. 2002.
[11] T. Yao, M. Q. Gordon, K. K. W Tang, K. H. K. Yau, M. T. Yang, P. Schvan, and S. P. Voinigescu, “Algorithmic design of CMOS LNAs and PAs for 60-GHz radio,” IEEE J. Solid-State Circuits, Vol. 42, Issue 5, pp.1044-1057, May 2007.
[12] B. Heydari, M. Bohsali, E. Adabi, and A. M. Niknejad, “A 60 GHz power amplifier in 90nm CMOS technology,” IEEE Custom Integrated Circuits Conf, pp.769-772, 16-19 Sept. 2007.
[13] M. F. Lei, Z. M. Tsai, K. Y. Lin, and H. Wang, “Design and analysis of stacked power amplifier in series-input and series-output configuration,” IEEE Microwave Trans Theory Tech., vol.55, no.12, pp.2802-2812, Dec. 2007.
[14] J. L. Kuo, Z. M. Tsai, K. Y. Lin, and H. Wang, “A 50 to 70 GHz power amplifier Using 90 nm CMOS Technology,” IEEE Microw. and Wireless Compon. Lett., vol.19, no.1, pp.45-47, Jan. 2009.
[15] D. Dawn, S. Sarkar, P. Sen, B. Perumana, M. Leung, N. Mallavarpu, S. Pinel, and J. Laskar, “60GHz CMOS power amplifier with 20-dB-gain and 12dBm Psat,” IEEE MTT-S Int. Micro. Symp. Dig.,, vol., no., pp.537-540, 7-12 June 2009.
[16] D. Dawn, S. Sarkar, P. Sen, B. Perumana, D. Yeh, S. Pinel, and J. Laskar, “17-dB-gain CMOS power amplifier at 60GHz,” IEEE MTT-S Ins. Microw. Symp. Dig., vol., no., pp.859-862, 15-20 June 2008.
[17] Y. N. Jen, J. H. Tsai, T. W. Huang, and H. Wang, “Design and analysis of a 55–71-GHz compact and broadband distributed active transformer power amplifier in 90-nm CMOS process,” IEEE Trans. Microw. Theory Tech., vol.57, no.7, pp.1637-1646, July 2009.
[18] N. Kurita and H. Kondoh, “60GHz and 80GHz wide band power amplifier MMICs in 90nm CMOS technology,” IEEE Radio Frequency Integrated Circuits Symp., vol., no., pp.39-42, 7-9 June 2009.
[19] Y. N. Jen, J. H. Tsai, T. W. Huang, and H. Wang, “A v-band fully-integrated CMOS distributed active transformer power amplifier for 802.15.TG3c wireless personal area network applications,” IEEE Compound Semiconductor Integrated Circuits Symp., vol., no., pp.1-4, 12-15 Oct. 2008.
[20] Y. Hamada, M. Tanomura, M. Ito, and K. Maruhashi, “A high gain 77 GHz power amplifier operating at 0.7 V based on 90 nm CMOS technology,” IEEE Microw. Wireless Compon. Lett., vol.19, no.5, pp.329-331, May 2009.
[21] G. Liu, P. Haldi, T. J. King Liu, and A. M. Niknejad, “Fully integrated CMOS power amplifier with efficiency enhancement at power back-off,” IEEE J. Solid-State Circuits, vol.43, no.3, pp.600-609, March 2008.
[22] B. Jin, Q. Wu, G. Yang, F. Meng, J. Fu, and K. Tang, “Fully-integrated CMOS power amplifier design for WiMAX application with semi-lumped transformer,” IEEE Industrial Informatics, vol., no., pp.181-185, 13-16 July 2008.
[23] 陳致宏,“微波存取全球互通頻段前向匯入式功率放大器與高效率Class F類功率放大器暨壓控震盪器電路之研製,” 中央大學,碩士論文, 2007。
[24] 呂紹良,“微波存取全球互通頻段變壓器耦合式功率放大器與電壓控制振盪器暨除頻器之研製,” 中央大學,碩士論文, 2008。
[25] 陳建中,“使用功率結合變壓器功率放大器與反E類開關式功率放大器研製,
” 中央大學,碩士論文, 2009。