用於類比電路仿真之波動數位濾波器架構的自動建構方法

簡易檢索 / 詳目顯示

回結果列表

研究生：	蔡秉翰 Bing-han Tsai
論文名稱：	用於類比電路仿真之波動數位濾波器架構的自動建構方法 Automatic Construction of Wave Digital Filter Structure for Analog Circuit Emulation
指導教授：	周景揚 Jing-yang Jou
口試委員:
學位類別：	碩士 Master
系所名稱：	資訊電機學院 - 電機工程學系 Department of Electrical Engineering
論文出版年：	2015
畢業學年度：	103
語文別：	英文
論文頁數：	65
中文關鍵詞：	波動數位濾波器、類比電路仿真
外文關鍵詞：	Wave Digital Filter, Analog Circuit Emulation
相關次數：	點閱：21 下載：0
分享至:	分享至facebook 分享至twitter

查詢本校圖書館目錄查詢臺灣博碩士論文知識加值系統勘誤回報

隨著製程的演進，混合訊號(Analog/mixed-signal)系統的晶片設計變得越來越昂貴且複雜，因此在測試和設計類比系統時，類比晶片的模擬(Simulation)和仿真(Emulation) 變得很重要，使用波動數位濾波器(Wave Digital Filter)的轉換法則，將類比電路轉換成數位電路來加以模擬是一個快速且準確的方法，相較於其他的模擬方法，這個方法產生較少的運算單元而且在不同製程也有較佳的適應性，然而將類比電路轉換成波動數位架構電路是非常耗時且易出錯的，因此發展一個自動化的波動數位架構產生器是急迫且必須的。

在本篇論文中，我們提出了一個自動產生波動數位架構的產生器。在轉換階段，此產生器降低了波動數位架構的連接器(Adaptor)數量達到降低面積的目的，除此之外，提出的產生器也有效的降低了架構的深度以達到提升電路的效能。根據幾個實驗的電路，本論文發展的產生器成功地根據對映的類比電路合成出有較少連接器數量和較低深度的波動數位架構。

The design and development of analog/mixed-signal (AMS) integrated circuits (ICs) is becoming increasingly expensive and complex as the process technologies advances. Simulation and emulation of analog ICs will be crucial in the design and testing of complex analog systems. Using Wave Digital principle to convert the analog circuit to digital circuit is a fast and accurate way to approach analog simulation and emulation. It generates fewer calculation units after converting by WD principle and is more applicable in different processes than other approaches. However, it is very time-consuming and error-prone in converting the analog circuit to the wave digital structure circuit manually. Therefore, it is urgent and necessary to develop an automatic wave digital structure generator.

The thesis proposes an efficient algorithm to generate legal Wave Digital structure. In the mapping step, the generator reduces the amount of adaptors in the Wave Digital structure to reduce area. In addition, the proposed generator can also reduce the depth of the structure to enhance the circuit performance. According to the experimental results on several circuits, the generator successfully generates the correct wave digital structure with fewer adaptors and smaller depth for corresponding analog circuits.

摘要    i
Abstract    ii
Acknowledgment    iii
Contents    iv
List of Figures    vi
List of Tables    viii
Chapter 1    Introduction    1
1-1    Motivation    1
1-2    Previous Analog Emulators    2
1-3    WDF for Analog Emulation    5
1-4    Thesis Organization    7
Chapter 2    Background    8
2-1    Theory and Practice of the Wave Digital Filter    8
2-1-1    Delay Free Loop Problem    8
2-1-2    Wave Digital Transformation    10
2-1-3    Linear Components    10
2-1-4    Adaptors    12
2-1-5    Special WD Modules    15
2-1-6    Two-Terminal WD MOS Module    16
2-1-7    Wave Behavior    19
2-2    Tree Structure Construction    19
2-2-1    Related Work on WD Tree Structure Construction    20
2-2-2    Series-Parallel Tree Structure    21
2-2-3    Problems in Constructing WDF Structure    21
Chapter 3    Wave Digital Structure Generation Flow    23
3-1    Behavior Extraction    24
3-2    Reconstruction    25
3-2-1    Series-parallel Judgment    26
3-2-2    Serial and Parallel Pair Block Creation    26
3-3    Circuit Simplification    29
3-3-1    Untransformed Circuit Problem    29
3-3-2    Loop Detection    29
3-3-3    Voltage/Signal Source Separation    30
3-3-4    Y-∆ /∆-Y Transformations    30
3-4    Adaptor Insertion    31
3-4-1    Ground Node Insertion and No Ground Insertion    31
3-4-2    Initial Insertion    33
3-4-3    Adaptor Elimination    35
3-5    Rotation    36
3-6    WD Structure Netlist    38
Chapter 4    Experimental Results    40
4-1    Experimental Environment    40
4-2    Common Source Amplifier    40
4-3    Cascade Common Source Amplifier    43
Chapter 5    Conclusions and Future Works    48
References    49

                                

[1] Fettweis, ”Wave digital filters: theory and practice,” Proceedings of the IEEE, vol. 74, no. 2, pp. 270–327, 1986.
[2] H. Kutuk and S.-M. Kang, “A field-programmable analog array (FPAA) using switched-capacitor techniques,” in Proc. IEEE Int’l Symp. on Circuits and Systems, vol. 4, 1996, pp. 41-44, 1996.
[3] E. K. Lee and W. L. Hui, “A novel switched-capacitor based field-programmable analog array architecture,” in Field-Programmable Analog Arrays, Springer, pp. 33-50, 1998.
[4] E. K. Lee and P. G. Gulak, “A transconductor-based field-programmable analog array,” in Proc. IEEE Int’l Solid-State Circuits Conf., pp. 198-199, 1995.
[5] Pankiewicz, M. Wojcikowski, S. Szczepanski, and Y. Sun, “A field programmable analog array for CMOS continuous-time OTA-C filter applications,” IEEE J. Solid-State Circuits, vol. 37, no. 2, pp. 125-136, 2002.
[6] T. S. Hall, C. M. Twigg, J. D. Gray, P. Hasler, and D. V. Anderson, “Large-scale field-programmable analog arrays for analog signal processing,” IEEE Trans. on Circuits and Systems I: Regular Papers, vol. 52, no. 11, pp. 2298-2307, 2005.
[7] J. Suh, N. Suda, C. Xu, N. Hakim, Y. Cao, B. Bakkaloglu, “Programmable analog device array (PANDA): A Methodology for transistor-level analog emulation,” IEEE Trans. on Circuits and Systems I: Regular Papers,” vol. 60, no. 6, pp. 1369-1380, Jun. 2013.
[8] R. Zheng, J. Suh, C. Xu, N. Hakim, B. Bakkaloglu, and Y. Cao, “Programmable analog device array (PANDA): a platform for transistor-level analog reconfigurability,” in Proc. IEEE Design Automation Conf., pp. 322-327, 2011.
[9] N. Kapre, A. DeHon, “SPICE2: spatial processors Interconnected for concurrent execution for accelerating the SPICE circuit simulator using an FPGA,” IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 31, no. 1, pp. 9-22, Jan. 2012.
[10] R. L. Burden, J. D. Faires et al.,”Numerical analysis,” Brooks/Cole, vol. 6, 2001.

[11] I. Cederbaum,”Some applications of graph theory to network analysis and synthesis,” IEEE Transactions on Circuits and Systems, vol. 31, no. 1, pp. 64-68, Jan. 1984.
[12] M. H. White and R. C. Gallagher,"Metal-oxide-semiconductor(MOS) small-signal equivalent circuit", Proc. IEEE (Correspondence), vol. 53, pp.314 -315 1965
[13] Karlheinz Ochs and Benno Stein, “On the design and use of wave digital structures,” Report tr-ri-01-228 Series Computer Science, November 2001.
[14] CIC National Chip Implementation Center, “Hspice tutorial”
[15] C. A. Desoer and E. H. Kuh ,”Basic circuit theory”
[16] David Yeh, “Tutorial on wave digital filters,” CCRMA DSP Seminar January 25, 2008.
[17] R. Tarjan, “Depth-first search and linear graph algorithms,” in Proc. SWAT, pp. 114–121, 1971.

簡易檢索 / 詳目顯示

相關論文