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研究生: 蔡尹佳
Yin-Chia Tsai
論文名稱: 應用於波長650-nm及850-nm之標準CMOS製程矽光檢測器
指導教授: 辛裕明
Yue-Ming Hsin
口試委員:
學位類別: 碩士
Master
系所名稱: 資訊電機學院 - 電機工程學系
Department of Electrical Engineering
論文出版年: 2015
畢業學年度: 103
語文別: 中文
論文頁數: 97
中文關鍵詞: 光檢測器
外文關鍵詞: photodiode
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  • 本論文利用標準CMOS製程實現矽光檢測器,當入射光波長為650-nm時,由於光的吸收深度較接近元件表層的操作區,而基板產生之擴散載子可減少對頻率響應的影響。透過Silvaco公司之二維元件模擬軟體研究,相較於入射光波長為850-nm,又用於波長為650-nm時,可改善擴散載子造成之頻率響應滑落(roll-off)的情形,進而提升3-dB頻寬。同時針對不同的元件結構設計,分別為水平式之累崩光檢測器以及具Deep n-well之光檢測器,分別將其應用於不同入射光波長且操作在累崩區來做比較。最後利用0.25 µm標準CMOS 高壓製程實現多層PN接面之矽光檢測器,並針對不同深度之PN接面作進一步的分析,透過不同波長的光具有不同吸收深度之特性,使得不同深度之PN接面對應不同波長具有特性的差異。另外也利用光脈衝響應之量測,研究不同元件對脈衝的反應,分析長尾巴效應(long tail effect)的影響。


    This study presents photodetectors (PDs) implemented in standard CMOS technology. Due to the penetration depth of the 650-nm-wavelength light into Si is close to the depth of the depletion in the surface p-n diodes, which can reduce the frequency response of the PD degraded by the slow diffusion carriers. Silvaco TCAD simulation was used to verify that the diffusion roll-off in PD could be improved by reducing the diffusion component of photo-current at 650-nm wavelength. Furthermore, this study compared different device structures including avalanche photodetectors and photodetectors with deep n-well implantation. Finally, the photodetectors with different p-n junction depth implemented in standard 0.25 µm CMOS high voltage technology are discussed. The different wavelength performance of photodetectors with different p-n junction depth results from the characteristics of the penetration depth of light in silicon is wavelength-dependent. Besides, long tail effect was analyzed by the pulse measurement.

    摘要 i Abstract ii 致謝 iii 圖目錄 vi 表目錄 xii 第一章 導論 1 1.1 研究動機 1 1.2 相關研究發展 7 1.3 論文架構 23 第二章 光檢測器簡介 25 2.1 簡介 25 2.2 基本原理及特性 25 2.2.1 光檢測器工作原理 25 2.2.2 響應度及累崩增益 27 2.2.3 響應時間分析 30 2.3 以標準CMOS製程實現光檢測器 31 2.4 結論 35 第三章 650-nm與850-nm波長應用之標準CMOS製程光檢測器 36 3.1 簡介 36 3.2 元件模擬及設計 36 3.2.1 頻率響應之分析 36 3.2.2 元件特性比較 40 3.2.3 元件設計與CMOS製程 43 3.3 元件量測結果 47 3.3.1 元件直流特性及響應度 47 3.3.2 元件光脈衝響應 60 3.4 結論 65 第四章 多層PN接面之矽光檢測器 67 4.1 簡介 67 4.2 元件模擬及設計 67 4.2.1 元件特性之分析 67 4.2.2 元件設計與CMOS製程 71 4.3 元件量測結果 75 4.3.1 元件直流特性及響應度 75 4.3.2 元件光脈衝響應 85 4.4 結論 91 第五章 總結 93 參考文獻 95

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