基板貫孔近年來受到不少關注。在封裝技術的應用方面，可以透過基板貫孔的方式使晶片垂直連接，使總體的晶片面積縮小。在微波電路方面，基板貫孔可用於實現基於微帶線結構的電路，而不會僅限於單一平面的傳輸線結構（如共平面波導與槽線），使電路設計更自由且具彈性。
本論文主要著重於矽基板貫孔的製程發展。我們探討不同的矽蝕刻製程的優劣，最後選擇以反應離子蝕刻（reactive ion etching, RIE）機台搭配負光阻KMPR 1025來進行矽基板貫孔的製作，並以金電鍍的方式將連接基板兩面的金屬鍍厚。我們於厚度為150 μm的高電阻率矽基板上製作出的最小貫孔直徑為30 μm；量測結果顯示，在2.4 GHz的貫孔電感感值可低於100 pH，而貫孔電阻則可小於0.5 Ω。我們根據文獻中圓柱型貫孔的電感公式計算理論值，與量測得的電感值比較，發現量測值皆在理論值預估的範圍內。
我們成功地發展出矽基板貫孔的製程，製作出具低電感值及低電阻值的基板貫孔；此製程未來將可用於基於微帶線結構的微波電路的製作。
 

Through substrate via (TSV) has been receiving much attention in recent years. As a packaging technology, TSVs can be used for connecting chips vertically, reducing the footprint of the overall system. For microwave circuits, TSVs are used for realizing microstrip-based circuits. Without TSVs, the design would be limited to uniplanar structures, such as coplanar waveguides and slot lines. Therefore, TSV provides more design freedom and flexibility to the circuit designers.
This work focuses on the development of the fabrication process for TSVs on silicon. Different techniques for silicon etching are investigated and compared. Finally, reactive ion etching (RIE) with negative photoresist KMPR 1025 is chosen for the fabrication of TSVs on silicon and the metal that connects the top and bottom side of the substrate is thickened by gold electroplating. The minimum diameter of the TSV we fabricate on a 150-μm-thick high-resistivity silicon substrate is 30 μm. Measurement results show that, at 2.4 GHz, the inductance and resistance of the TSVs are less than 100 pH and 0.5 Ω, respectively. Based on the formula provided in the literature, we calculate the theoretical values of the inductances of vias with various diameters. Our measured inductance values fall within the range predicted by the theory.
In conclusion, a fabrication process for TSVs on silicon is developed. TSVs with low inductance and low resistance are fabricated. The developed process is suitable for realizing microwave circuits based on microstrip structure.

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