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研究生： 呂岳衡
Yueh-Heng Lu
論文名稱： 以類神經網路法設計光學邏輯閘
Study of Optical Neural Networks
指導教授： 陳啟昌
Chii-Chang Chen
口試委員:
學位類別： 碩士
Master
系所名稱： 理學院 - 光電科學與工程學系
Department of Optics and Photonics
論文出版年： 2024
畢業學年度： 113
語文別： 中文
論文頁數： 55
中文關鍵詞： 光學神經網絡 、邏輯閘 、光學元件
外文關鍵詞： Optical neuron networks, Logic gate, Integrated optical device
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    • 在本研究中，我們的目標是使用光放大器、定向耦合器(Directional Coupler , DC)和相位調制器(Phase Modulator , PM)來建立全光學邏輯閘。透過改良的Reservoir Computing(RC) 計算，進行反矩陣以獲得定向耦合器的耦合比和相位調制器的相位延遲，成功展示了 OR、AND、XOR、NAND、NOR 和 XNOR 。此外，我們不僅研究系統在理想條件下的結果，還討論操作上僅有1%誤差的情況，以研究RC系統的誤差。透過我們的模擬結果，可以觀察到光學邏輯閘的visibility可以高達0.83。這些邏輯閘可以應用在矽晶片中以開發光學計算系統。

    In this study, our goal is to build an all-optical logic gate using an optical amplifier, a directional coupler (DC), and a phase modulator (PM). Through the improved Reservoir Computing (RC) calculation, the inverse matrix was performed to obtain the coupling ratio of the directional coupler and the phase delay of the phase modulator, and OR, AND, XOR, NAND, NOR and XNOR were successfully demonstrated. Furthermore, we study the error of the RC system not only by studying the results of the system under ideal conditions, but also by discussing the case where the operation has only a 1% error. Through our simulation results, it can be observed that the visibility of the optical logic gate can be as high as 0.83. These logic gates can be used in silicon wafers to develop optical computing systems.

    摘要......................................i Abstract..................................ii 誌謝 .................................... iii 目錄 .................................... iv 圖目錄 ................................... vi 表目錄 ................................... vii 第一章 序論 ............................... 1 1.1 研究動機 .............................. 1 1.2 相關研究發展 .......................... 1 1.3 研究目的 .............................. 3 1.4 結論 ................................... 4 第二章 基礎理論與模擬方法介紹 ................. 5 2.1 元件介紹 .................................5 2.1.1 摻鉺光纖放大器 ......................... 5 2.1.2 耦合器 ................................ 5 2.1.3 馬赫-曾德爾調制器 ....................... 6 2.1.4 相位調制器 ............................. 7 2.2 模型介紹.................................. 8 2.3 結構模擬流程與公式推導...................... 9 2.4 邏輯閘................................... 17 2.5 結論..................................... 20 第三章 光電邏輯閘性能分析 ..................... 22 3.1 6種光電邏輯閘設計結果 ..................... 22 3.2 元件規格誤差導致之系統誤差分析...............24 3.3結論.......................................26 第四章 總論與未來展望 ......................... 27 4.1 總結 ..................................... 27 4.2 未來展望 .................................. 27 參考文獻....................................... 28

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