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研究生: 陳柏安
BO-AN CHEN
論文名稱: 應用於B5G高通量立方衛星之FPGA數位基頻 通訊系統設計與驗證
FPGA-Based Digital Baseband Communication System Design and Implementation for B5G High Throughput CubeSats
指導教授: 林映岑
Ying-tsen Lin
口試委員:
學位類別: 碩士
Master
系所名稱: 地球科學學院 - 太空科學研究所
Graduate Institute of Space Science
論文出版年: 2025
畢業學年度: 113
語文別: 中文
論文頁數: 152
中文關鍵詞: 數位基頻訊號設計衛星通訊酬載數位調變硬體設計
外文關鍵詞: B5G CubeSat
相關次數: 點閱:25下載:0
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  • 隨著非地面網路 (NTN) 與低軌道衛星通訊系統的蓬勃發展,如何在有限資源與高
    動態環境中實現穩定且高效的數位基頻通訊模組成為關鍵課題。為因應衛星任務對低
    延遲、高頻寬與模組化設計的需求,本研究提出一套符合DVB-S2標準之數位收發機
    架構,並以FPGA為核心實現系統設計。
    藉由Zynq SoC 結合AD9361 RF前端,構建出完整的SDR平台。發射端訊號以自
    行設計之DVB_DM1訊號模組為主,支援不同 Oversampling Ratio (OVSR) 配置以模
    擬變化頻寬場景;接收端則透過 ILA、DMA與 PYNQ平台實現即時資料回收與後端
    數位訊號處理。系統最終成功整合並實驗於3U立方衛星「Nightjar」通訊酬載中。此
    外也整合UHF次系統,並通過包含熱真空、振動、輻射等環境測試驗證。並且實驗結
    果顯示本系統在短距與20公尺OTA對傳中皆可達成低於10%的誤差向量幅度
    (EVM),證實本設計架構具備實用性與高度可擴展性,為實現B5G衛星通訊模組提供
    具體實作方案與驗證依據。


    With the emergence of Non-Terrestrial Networks (NTN) and Low Earth Orbit (LEO)
    satellite systems, the development of efficient and robust digital baseband architecture has
    become essential. This study presents an FPGA-based DVB-S2 compliant digital transceiver
    architecture for satellite communication payloads.
    The system integrates a Zynq SoC and AD9361 RF front-end to form a complete SDR
    platform. A custom DVB_DM1 module is designed to support variable oversampling ratios,
    simulating diverse bandwidth scenarios. The receiver incorporates ILA, DMA, and PYNQ for
    real-time data capture and backend processing. The architecture is implemented and verified
    on the 3U CubeSat “Nightjar,” alongside a UHF subsystem. Environmental validation
    including thermal vacuum, vibration, and radiation tests was conducted.
    Experimental results confirm that the system achieves error vector magnitude (EVM)
    below 10% in both short-range and 20-meter OTA transmission, demonstrating its practicality
    and scalability for future B5G satellite applications.

    摘要 i ABSTRACT ii 致謝 iii 目錄 iv 表目錄 x 圖目錄 xii 第一章 緒論 1 1.1 研究動機與背景 1 1.2 論文架構 2 1.3 衛星軌道 2 1.4 衛星通訊頻段 4 1.5 低軌衛星與5G NTN 8 1.6 Miniature Software Define Radio 微型軟體定義無線電 10 第二章 基頻訊號模組、規格介紹 12 2.1 Single Tone 12 2.2 DDS模組參數設置 13 2.2.1 Vivado Block Design 15 2.3 DVB_DM1 16 2.3.1 DVB-S2規格 16 2.3.2 DVB-S2發射機 17 2.3.3 Mode Adaptation 17 2.3.4 Baseband Header Insertion 18 2.3.5 Stream Adaptation 19 2.3.5.1 Padding 20 2.3.5.2 Baseband Scrambling 21 2.3.6 Forward Error Correction Encoding 22 2.3.6.1 BCH 23 2.3.6.2 LDPC 24 2.3.6.3 Bit Interleaver 25 2.3.7 Bit Mapper 27 2.3.7.1 QPSK 27 2.3.7.2 8PSK 28 2.3.7.3 16APSK 28 2.3.7.4 32APSK 29 2.3.8 Physical Layer Framing 30 2.3.8.1 Dummy PLFRAME insertion 31 2.3.8.2 PL Signaling 31 2.3.8.3 Pilot Insertion 33 2.3.8.4 Physical layer scrambling 33 2.3.9 基頻濾波器與RF端 34 2.3.10 DVB_DM1訊號 36 2.3.11 DVB_DM1接收端流程 37 2.3.11.1 Matched Filter 38 2.3.11.2 Symbol Timing Synchronizer (STS) 38 2.3.11.3 Carrier Frequency and Phase Synchronizer (CFS) 42 2.3.11.4 Frame Synchronizer (FS) 44 第三章 DVB_DM1收發機基頻電路實現 45 3.1 ZedBoard & AD9361 45 3.2 基頻電路設計架構 47 3.2.1 發射端架構 48 3.2.2 接收機架構 50 3.2.3 資料傳輸協定 51 3.2.4 Timing & Utilization Report 52 3.3 自傳自收訊號驗證 54 3.3.1 Transceiver Architecture 54 3.3.2 PYNQ 56 3.3.3 ILA Certification 57 3.3.3.1 Tx端 58 3.3.3.2 Rx端 60 3.3.4 Data Certification 63 3.3.4.1 Single Tone 63 3.3.4.2 DVB_DM1 66 3.4 20公尺短距離對傳實驗驗證與評估 71 3.4.1 測試環境與配置 71 3.4.2 有線傳輸校正 71 3.4.3 測試結果 74 第四章 Nightjar夜鷹號3U立方衛星 76 4.1 任務目標 77 4.2 軌道模擬 78 4.3 鏈路預算 80 4.3.1 UHF Uplink / Downlink 81 4.3.2 Ku band Uplink / Downlink 82 4.4 UHF Subsystem Integration 84 4.4.1 UHF transceiver 84 4.4.1.1 Beacon 86 4.4.1.2 Parameter & Spectrum 87 4.4.1.3 UHF & OBC beacon testing 88 4.4.2 UHF Ground Station 91 4.4.3 UHF Antenna功能測試整合 93 4.4.3.1 Return loss 93 4.4.3.2 Algorithm Testing 95 4.4.3.3 Test Mode 99 4.5 Ku Band Communication Payload (KuCPL) 103 4.5.1 KuCPL硬體規格、架構 103 4.5.2 KuCPL訊號、電性規格 104 4.5.3 KuCPL 參數指令 108 4.6 KuCPL訊號規格及實際訊號 111 4.7 KuCPL 環境測試整合 113 4.7.1 振動測試 114 4.7.2 輻射測試 115 4.7.3 熱真空測試 116 4.8 Nightjar入軌後之UHF通聯結果 118 4.8.1 全球各地之接收結果 122 第五章 結論與未來展望 127 參考文獻 128

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