本論文主要以一維等效電路模型作元件及電路的混階模擬，並針對金氧半電容(MOS-C)元件的直流、暫態與交流上的特性作一模擬分析。首先，論文將引入二極體切換電路的暫態模擬，並探討串聯電阻對整體電路的影響。其次，為了改善以往使用節點分離法來分析MIS系統的閘極邊界條件所造成的缺失；在論文中我們研究並建立SOS (Semiconductor-Oxide-Semiconductor)的模型，來探討數值模擬技巧及電荷守恆、遷移電流等之物理特性。
論文中我們設計RE(Ramp Excitation)及RSE(Ramp-Sinusoid Excitation)的方法以作為半導體元件的應用，並與CP(Charge Partition), FD(Fourier Decomposition of Transient Excitations), 及S3A(Sinusoidal Steady-State Analysis)三種數值量測的方法比較；經由RE及RSE的方法的建立，及MOS特性的C-V模型的輔助，我們可以獲得較佳的數值量測結果。進一步我們並將所設計的模型用以分析高頻和低頻的特性及深入探討MOS元件核心內部的運作機制。
最後，我們將所建立的模型，用以探討MOS元件內部非理想的成因；並在準靜態(Quasi-Static)條件下分析其Bias Sweep Rate對C-V曲線所造成偏移的現象。另一方面，在簡化二維模型設計中，藉以Fowler-Nordheim tunneling作為充放電的電流傳導機制，建立一維的浮動電極模型；內部元件參數可經由適當地調整，用以設計分析耦合係數、臨限電壓及動態時儲存/抹除記憶的動作。

This thesis presents an one-dimensional equivalent circuit model for mixed-level device and circuit simulation, and do an analysis for numerical measurements on MOS-C device dc, ac and transient simulation. First, the thesis will introduce the transient simulation of PN diode switching circuit, and then verify the existed series resistance effect to the switching circuit. Moreover, we study and develop SOS (Semiconductor-Oxide-Semiconductor) model to improve the imperfection of the electrode separation model for the analysis of the boundary condition in MIS (Metal-Insulator-Semiconductor) device. In SOS model, we can discuss the numerical simulation technique, charge conservation, and displacement current.
In the thesis, we develop the RE (Ramp Excitation) and RSE (Ramp-Sinusoid Excitation) methods for the semiconductor applications, and compare then to CP (Charge Partition), FD (Fourier Decomposition of Transient Excitations), and S3A (Sinusoidal Steady-State Analysis) methods for numerical measurements. Furthermore, we will recommend the RE and RSE methods with the C-V models to analyze the low-frequency and high-frequency characteristics, and investigate the phenomenon in MOS-C device to understand the operated mechanism inside it.
Finally, we will propose the model to discuss the nonideal reason of the MOS system, and the C-V curve shift due to bias sweep rate at the quasi-static condition. On the other hand, we simplify two-dimensional into one-dimensional equivalent circuit model to design the floating-gate device model using Fowler-Nordheim tunneling current for the conduction mechanism. The coupling ratio, the threshold voltage characteristics, the program and erase operation can be implemented and analyzed.

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