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研究生： 陳虹如
Hung-Ju Chen
論文名稱： 以軟體定義無線電設計與實現可參數控制TDD OFDM收發機
Design and Implementation of a Configurable TDD OFDM Transceiver with SDR
指導教授： 陳逸民
Yih-Min Chen
口試委員:
學位類別： 碩士
Master
系所名稱： 資訊電機學院 - 通訊工程學系
Department of Communication Engineering
論文出版年： 2021
畢業學年度： 109
語文別： 中文
論文頁數： 125
中文關鍵詞： 正交分頻多工 、軟體定義無線電 、發射機 、接收機 、上行鏈路 、下行鏈路 、分時雙工 、FPGA
外文關鍵詞： OFDM, FPGA, UpLink, Downlink, Software-defined-radio, Transmitter, Receiver, TDD
相關次數： 點閱：15  下載：0 
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    • 隨著無線通訊技術的發展與進步，不管是第四代LTE（Long Term Evolution）行動通訊或第五代行動通訊中，正交分頻多工（Orthogonal Frequency Division Multiplexing, OFDM）的技術依然扮演十分重要的角色。
    本論文將會旨在以可參數控制分時雙工（Time Division Duplexing, TDD）的正交分頻多工之上行與下行鏈路系統與其調變原理做介紹，也會著墨在主（Slave）從（Master）系統之間的溝通與參數控制模式及訊框同步。將以軟體定義無線電（Software Defined Radio, SDR）方式設計並實現上行及下行鏈路系統的發射機與接收機，在整合到主從系統後，實現即時的在同一頻率不同時間上，完成使用者與基地台之間的溝通。並在時域上以第三方來觀測主從系統傳收的訊號分布狀況；又以觀測經過通道後不同增益帶來的影響，來探討本論文系統的品質。

    With the advancement of wireless communication technology, whether the 4G-LTE (Long Term Evolution) mobile communications or 5G mobile communications, Orthogonal Frequency Division Multiplexing (OFDM) technology still plays a very important role.
    The main purpose of the paper is to introduce OFDM uplink and downlink system and its modulation principle with parameter control of Time Division Duplexing (TDD). It will also focus on the communication between master–slave system, the parameter control mode and frame synchronization.
    The transmitter and receiver of the uplink and downlink system will be designed and implemented on Software Defined Radio (SDR). After being integrated into the master-slave system, the communication between the user and the base station can be completed at the same frequency and different time in real time. Use a third party to observe the distribution of the signal transmitted and received in the time domain; and observe the influence of different gains after passing through the channel to discuss the quality of the system in this paper.

    摘要 i Abstarct ii 誌謝 iii 目錄 iv 圖目錄 viii 表目錄 xiv 第一章 緒論 1 1-1 研究動機與背景 1 1-2 章節簡介 2 第二章 TDD OFDM系統簡介 3 2-1 正交分頻多工調變原理 3 2-2 保護區間(Guard Interval) 7 2-3 正交分頻多重存取系統 9 2-4 TDD OFDM系統介紹 10 2-5 上下行鏈路分時雙工工作原理 12 第三章 TDD OFDM上下行鏈路系統 13 3-1 上行與下行鏈路發射機 17 3-1-1 星座圖映射器 17 3-1-2 領航訊號與參數訊號 18 3-1-3 快速傅立葉轉換 19 3-1-4 循環字首 21 3-2 上行與下行鏈路接收機 22 3-2-1 符元時序同步（Symbol Timing Synchronization） 22 3-2-2 符元時序偏移討論 22 3-2-3 符元時序同步原理 23 3-2-4 載波頻率同步 24 3-2-5 載波頻率誤差之影響 24 3-2-6 載波頻率同步原理 27 3-2-7 訊框同步 28 3-2-8 通道估測 29 3-2-9 取樣後維持通道估測（Sample and Hold） 32 第四章 Master端與Slave端系統硬體實現 33 4-1 Master端下行鏈路發射機、上行鏈路接收機系統架構 33 4-2 Master端TX - 下行鏈路發射機 34 4-2-1 星座圖映射器 34 4-2-2 領航訊號與參數訊號產生器 35 4-2-3 訊框架構產生器 36 4-2-4 子載波分配器 38 4-2-5 快速反傅立葉轉換器 41 4-2-5-1 FFT/IFFT 切換 43 4-2-5-2 蝶型運算器 44 4-2-5-3 FFT時序控制 47 4-2-5-4 位元反轉排序 48 4-2-6 循環字首產生器 50 4-2-7 升取濾波器 52 4-2-8 下行鏈路可參數控制TDD控制器 56 4-3 Master端RX - 上行鏈路接收機 59 4-3-1 降取濾波器 59 4-3-2 符元時間同步與載波頻率同步模組 61 4-3-2-1 延遲相關器模組 62 4-3-2-2 峰值檢測器模組 64 4-3-3符碼同步 66 4-3-4載波頻率同步器 67 4-3-5上行鏈路訊框同步模組 68 4-3-6 快速傅立葉轉換器 71 4-3-7 解子載波分配器 71 4-3-8 解訊框架構器 74 4-3-9 通道估測 76 4-3-6-1 通道響應 76 4-3-6-2 線性內插法 78 4-3-10 通道等化 80 4-4 Slave端上行鏈路發射機、下行鏈路接收機系統架構 82 4-5 Slave端 – Slave TDD Controller 83 4-6 Slave端TX – 上行鏈路發射機 84 4-6-1 上行鏈路可參數控制TDD控制器 85 4-7 Slave端RX – 下行鏈路接收機 88 4-5-1 下行鏈路訊框同步模組 88 第五章 軟體定義無線電平台與硬體實驗結果 90 5-1 軟體定義無線電 90 5-2 軟體定義無線電平台 90 5-3 FPGA（AC701） 92 5-4 RF Module（AD9361） 92 5-4 實驗結果 94 5-4-1 合成報告書 95 5-4-2 發射機硬體實現結果 96 5-4-3 接收機硬體實現結果 99 第六章 結論 102 參考文獻 103

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