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研究生: 孟天祥
Tien-Hsiang Meng
論文名稱: 具有低漣波電壓及高動態響應漣波降壓式穩壓器設計
Low Ripple Voltage and High Transient Response Ripple-Based Buck Converter Design
指導教授: 鄭國興
Tien-Hsiang Meng
口試委員:
學位類別: 碩士
Master
系所名稱: 資訊電機學院 - 電機工程學系
Department of Electrical Engineering
論文出版年: 2017
畢業學年度: 105
語文別: 中文
論文頁數: 64
中文關鍵詞: 動態響應漣波電壓控制降壓式穩壓器
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  • 由於電子產品的設計朝向輕、薄、短、小且多功能發展,使得產品的功耗與功率密度相對增加。在使用多種的產品功能的同時,也代表所需負載的變化量變大,特別是使用通訊網路功能。電源管理晶片的發展因為高轉換效能的技術已經趨於飽和,逐漸朝向能快速響應與提高功率密度發展。一方面電源管理晶片必須依照系統負載需求提供穩定輸出電壓,才能夠使系統能正常工作;另一方面,電子產品體積逐漸縮小,電源管理晶片必須在有限的佈線面積內使用最少的零件數來符合系統需求。因此電源管理晶片具有快速的暫態響應與減少使用零件數的功能成了相當重要的課題。
    本論文設計一個具有快速暫態響應輸出漣波電壓控制降壓轉換器,同時也具備了使用零件數少的優點。其中提出以偵測輸出電壓的變化來調整操作頻率,電路取得輸出電壓的變化,適當調整功率電晶體導通週期來調節輸出電壓位準及提升負載調節度。論文中晶片的工作電壓範圍為2.5V~4.6V,操作頻率為1MHz,提供1V的輸出電壓,在外部電感為1.2uH以及外部電容330uF情況下,可供應負載範圍0.01A~1A,輸出電壓的漣波大小為10mV、輸出電壓誤差1%的降壓式轉換器並針對電路提出一套設計流程來完成電路的模擬。因此可以確保在合宜元件及參數下,提出符合應用規格所需之最佳化電路設計。因此依上述之轉換器與設計流程,完成了一個有快速響應、零件數低以及最佳化參數值,來滿足系統功能的增加並提高功率密度。


    As designs of portable electronic products are developed toward being light, thin, short, small and multi-functional, making the power consumption and power density of the products are relatively increased. While using a variety of product features, it also represents that a large amount of load changes is required, especially when using communication network functions. The development of power management chips have become saturated because of the technology of high conversion efficiency, and gradually develop toward the rapid response and high power density. On the one hand, the power management chip must provide a stable output voltage in accordance with the requirements of the system load to make the system work; on the other hand, the size of electronic product gradually reduced; the power management chip must be limited in the wiring area with the fewest of parts to meet system requirement. Therefore, how to make the power management chip with functions of fast transient response and to reduce the number of parts used has become a very important issue.
    In this study, a ripple voltage control buck converter with fast transient response output was designed, and it also has the advantage of using fewer parts. We proposed that by detecting the changes of output voltage to adjust the operating frequency, adjust the circuit to obtain the output voltage changes, and adjust the power transistor conduction cycle appropriately to tune the output voltage level and enhance the load regulation. The operating voltage range of the chip is 2.5V ~ 4.6V, the operating frequency is 1MHz and the output voltage is 1V. When the external inductance is 1.2uH and the external capacitance is 330uF, the chip is able to supply a buck converter with load range 0.01A ~ 1A, the Ripple size of output voltage 10mV, and 1% of the output voltage error, and in the study we also proposed a set of circuit design process to complete the circuit simulation. It is therefore possible to ensure that the optimum circuit design is required to meet the applicable specifications under suitable components and parameters. Therefore, according to the converter and the design process described above, a chip with a fast response, low number of parts and optimized parameters are completed to meet the need of increase in system function and power density.

    摘要 i Abstract ii 誌謝 iv 目錄 v 圖目錄 vii 表目錄 viii 第1章 緒論 1 1.1 研究背景 1 1.2 穩壓器種類 3 1.2.1 線性穩壓器(Linear Regulation) 3 1.2.2 切換式穩壓器(Switching Regulation) 4 1.3 預計實現之功能及論文架構 8 第2章 穩壓器規格說明 9 2.1 線性調節度(Line Regulation) 9 2.2 負載調節度(Load Regulation) 9 2.3 暫態響應(Transient Response) 10 2.4 切換損失(Switching Loss) 11 2.5 導通損失(Conduction Loss) 12 2.6 轉換效能(Efficiency) 12 第3章 控制電路分類 14 3.1 電壓模式控制(Voltage Mode Control) 14 3.2 電流模式控制(Current Mode Control) 21 第4章 漣波穩壓控制與降壓式轉換器設計流程 25 4.1 遲滯穩壓器(Hysteretic Regulator)[10] 26 4.2 固定導通時間穩壓器(Constant-On-Time Regulator)[10] 28 4.3 固定截止時間穩壓器(Constant-Off-Time Regulator)[10] 30 4.4 降壓式轉換器設計流程 31 第5章 降壓式漣波轉換器設計與模擬 37 5.1 動作原理 37 5.2 電路分析 40 5.3 規格設定與計算 43 5.4 模擬結果 44 5.4.1 規格模擬 45 5.4.2 暫態模擬 47 5.4.3 極限值模擬 48 第6章 結論 51 參考文獻 52

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