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研究生： 董宗賓
Zong-Bin Dong
論文名稱： 整合影像串流傳輸的高速現場總線控制器設計與硬體實作
Design and Implementation of High Speed Hardware Controller for Integrating Video Streaming With Fieldbus Network
指導教授： 陳慶瀚
口試委員:
學位類別： 碩士
Master
系所名稱： 資訊電機學院 - 資訊工程學系
Department of Computer Science & Information Engineering
論文出版年： 2018
畢業學年度： 106
語文別： 中文
論文頁數： 110
中文關鍵詞： 現場總線 、影像串流傳輸
相關次數： 點閱：15  下載：0 
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    • 在工業物聯網與智慧製造應用的推動下，工業控制和機器視覺已成為不可或缺的項目，兩者的整合有其必要性。然而目前自動化系統所採用的工業現場總線技術主要基於控制的需求，難以與取像(imaging)系統進行整合，須透過兩套系統獨立運作，進而產生額外的佈線成本及管理上的困難。本研究設計一個新的現場總線硬體控制器，在Gigabit乙太網路為傳輸介面的協定上，實現Gigabit Modbus UDP控制器、Modbus工業現場總線協議和影像傳輸協議，完成一個可整合影像傳輸的Gigabit Modbus現場總線晶片。我們採用環狀拓樸的布線及搭配管線化處理封包，達到既可進行工業控制也可即時收集影像資料並降低佈線成本。此一現場總線晶片透過FPGA驗證其優異的性能。最後，我們比較本系統在不同網路拓樸下的效能比較，驗證在低成本環狀拓樸的現場總線網路中，本系統可以在精確的時間響應內，實現工業控制和影像傳輸的整合應用。

    Under the development of Industrial Internet of Things and intelligent manufacturing, industrial control and machine vision have become indispensable items, their integration is necessary. However, the industrial fieldbus technology used by the present automatic system is based on control requirement, difficult to be integrated with imaging system, two systems must run independently, resulting in extra wiring cost and difficulties in management. This study designs a new fieldbus hardware controller, the Gigabit Modbus UDP controller. Modbus industrial fieldbus protocol and image transmission protocol are implemented on the protocol of Gigabit Ethernet as transmission interface, a Gigabit Modbus fieldbus chip which can be integrated with image transmission is completed. The wiring of ring topology and pipeline are used to process packets, the industrial control is performed, the image data are collected instantly, and the wiring cost is reduced. The excellent performance of this fieldbus chip is validated by FPGA. Finally, the effectiveness of this system in different network topologies is worked out, it is validated that in the fieldbus network of low cost ring topology, this system can implement the integrated application of industrial control and image transmission within precise time response.

    摘要 I Abstract II 誌謝 III 目錄 IV 圖目錄 VIII 表目錄 XII 第一章、 緒論 1 1.1 研究背景 1 1.2 研究目的 3 1.3 論文架構 3 第二章、 技術回顧 4 2.1 工業現場總線網路 4 2.2 Modbus現場總線通訊協定 4 2.2.1 Modbus協定架構 5 2.2.2 Modbus主從狀態圖 6 2.2.3 Modbus封包格式 9 2.3 乙太網路通訊架構 12 2.3.1 ISO/OSI 參考模型 12 2.3.2 TCP/IP參考模型 13 2.3.3 IP通訊協定 14 2.3.4 UDP通訊協定 15 2.3.5 ICMP通訊協定 17 2.3.6 ARP通訊協定 18 2.3.7 乙太網路封包格式(MAC Frame Format) 19 第三章、 Gigabit Modbus UDP控制器架構設計 21 3.1 硬體加速控制器設計 21 3.1.1 Gigabit Modbus UDP控制器 22 3.1.2 ARP控制器 23 3.1.3 IP控制器 24 3.1.4 ICMP控制器 24 3.1.5 UDP控制器 25 3.1.6 Modbus控制器 26 3.2 MIAT系統設計方法論 27 3.2.1 IDF0階層式模組化設計 28 3.2.2 Grafcet 離散事件建模 30 3.2.3 硬體高階合成 33 3.3 硬體加速控制器IDEF0 34 3.3.1 Master閘道器IDEF0 34 3.3.2 Slave IDEF0 35 3.3.3 Gigabit Modbus UDP控制器IDEF0 36 3.3.4 ARP控制器IDEF0 37 3.3.5 IP控制器IDEF0 38 3.3.6 ICMP控制器IDEF0 39 3.3.7 UDP控制器IDEF0 40 3.3.8 Modbus控制器IDEF0 41 3.4 硬體加速控制器Grafcet 42 3.4.1 Master閘道器Grafcet 42 3.4.2 Slave系統Grafcet 46 3.4.3 Gigabit Modbus UDP控制器Grafcet 47 3.4.4 ARP控制器 Grafcet 49 3.4.5 IP控制器Grafcet 50 3.4.6 ICMP控制器Grafcet 53 3.4.7 UDP控制器Grafcet 55 3.4.8 Modbus控制器Grafcet 57 3.5 硬體合成 59 3.5.1 Gigabit Modbus UDP控制器硬體電路合成 59 3.5.2 ARP控制器硬體電路合成 60 3.5.3 IP控制器硬體電路合成 61 3.5.4 ICMP控制器硬體電路合成 62 3.5.5 UDP控制器硬體電路合成 63 3.5.6 Modubs控制器硬體電路合成 64 第四章、 硬體驗證與實驗結果 66 4.1 實驗平台 66 4.1.1 FPGA開發平台 66 4.1.2 CMOS Sensor 67 4.1.3 PC軟體驗證平台 68 4.2 系統功能模組波型驗證 69 4.2.1 Gigabit Modbus UDP控制器波型驗證 70 4.2.2 ARP控制器波型驗證 71 4.2.3 IP控制器波型驗證 72 4.2.4 ICMP控制器波型驗證 73 4.2.5 UDP控制器波型驗證 74 4.2.6 Modbus控制器波型驗證 75 4.3 系統整合驗證 76 4.3.1 ARP系統整合驗證 77 4.3.2 ICMP-Ping系統整合驗證 79 4.3.3 Modbus系統整合驗證 81 4.3.4 Modbus-Stream影像串流系統整合驗證 83 4.4 硬體加速驗證 85 4.5 通訊響應實驗 87 第五章、 結論與未來展望 90 5.1 結論 90 5.2 未來展望 91 參考文獻 92

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