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研究生: 曾銘志
Ming-Jhih Zeng
論文名稱: 三角形模組開發與任意二維半導體元件模擬
Development of Triangular element and its applications to arbitrary 2D Semiconductor device
指導教授: 蔡曜聰
Yao-Tsung Tsai
口試委員:
學位類別: 碩士
Master
系所名稱: 資訊電機學院 - 電機工程學系
Department of Electrical Engineering
論文出版年: 2014
畢業學年度: 102
語文別: 中文
論文頁數: 50
中文關鍵詞: 銳角網格圓柱座標環繞式閘極
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  • 在本篇論文中,我們開發出任意銳角網格當基本元素,可應用於二維半導體元件模擬,具彈性空間使總節點數下降提高計算效率,並且使用圓柱座標轉換分析圓弧接面,使模擬更為精確迅速,接著利用簡單電阻做理論計算驗證,及PN二極體特性與矩形網格比較驗證,驗證結果後我們將任意銳角網格應用於圓柱型MOS電容器Gate all around結構上,並探討半徑對臨限電壓與氧化層厚度對臨限電壓之影響,最後再與傳統型MOSFET理論公式之臨限電壓比較。


    In this thesis, we develop an acute triangle mesh elements in arbitrary angles. Although we have a rectangular mesh analytical method, acute triangle mesh effectively to decrease the total amount of computation nodes. It can be applied to cylindrical coordinates for accurate and rapid simulation than the rectangular mesh simulations. For verification, a simple 2D resistor will be simulated and compared to the theoretical value. Finally, we simulate a gate-all-around MOS capacitor by acute triangle mesh. According to the result of MOS-C simulation, we discuss the dependence of threshold voltage on the radius and the oxide thickness.

    摘要 .............................................. i Abstract .......................................... ii 目錄 .............................................. iii 圖目錄 ............................................ iv 表目錄 ............................................ vi 第一章 簡介 ....................................... 1 第二章 二維網格等效模型分析 ....................... 2 2-1. 矩形網格分析概念 ............................. 2 2-2. 銳角網格結構定義 ............................. 5 2-3. 連續方程式等效電路模型建立 ................... 11 第三章 矩形網格與銳角網格探討及驗證 ............... 14 3-1. 簡單電阻於直角座標驗證 ....................... 14 3-2. 二維圓柱型電阻驗證 ........................... 16 3-3. 二極體之I-V特性曲線驗證 ...................... 18 3-4. 圓弧接面之二極體電位驗證 ..................... 20 第四章 銳角網格應用於MOS結構 ...................... 22 4-1. 圓柱型MOSFET結構 ............................. 22 4-2. 臨限電壓與半徑關係 ........................... 24 4-3. 電場分佈關係.................................. 31 第五章 結論 ....................................... 38 參考文獻 .......................................... 39

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    [6] L. Liu, Z. Li, Y. You, J. Xu,“Two-dimensional analytic model for fully depleted surrounding gate metal-oxide-semiconductor field-effect transistor, ”Hsi An Chiao Tung Ta Hsueh, pp. 73-77, Feb 2011.
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    [8] D. S. Lee, H.S. Yang, K.C. Kang, J.E. Lee, J.H. Lee, S. Cho, B.G. Park,“Simulation of gate-all-around tunnel field-effect transistor with an n-doped layer, ”IEICE Trans Electron, pp. 540-545, 2010
    [9] J. Y. Peng,“Current Characteristic and Electric-field Analysis in 2-D SOI Semiconductor Devise Simulation,” M.S. thesis, Dept. Elect. Eng., Natl. Cent. Univ., Chung-Li city, Taiwan, R.O.C., 2008.

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