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研究生: 洪睿
Jui Hung
論文名稱: 以磷化銦基板製做 高台型PIN光偵測器及其光電特性分析
Fabrication and Characterization of InP mesa-type PIN photodetectors
指導教授: 張正陽
Jenq-Yang Chang
口試委員:
學位類別: 碩士
Master
系所名稱: 理學院 - 光電科學與工程學系
Department of Optics and Photonics
論文出版年: 2017
畢業學年度: 105
語文別: 中文
論文頁數: 62
中文關鍵詞: 磷化銦光偵測器
外文關鍵詞: Mesa-type
相關次數: 點閱:26下載:0
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  • 在本論文中,我們利用磷化銦基板之磊晶片製做PIN結構的Mesa-type光偵測器,並使用硫化銨((NH4) 2Sx) 溶液進行元件表面之處理,並進一步探討硫化技術對元件特性之影響。在論文中元件經硫化處理後,展現出良好的元件特性,如低漏電流、低電容及較佳的高頻特性。為了阻絕漏電流,我們更進一步使用氮化矽(SiN)加上二氧化矽(SiO2)之複合膜。計算、量測並分析I-V及C-V的趨勢和眼圖特性。
    與平面結構相比,高台型結構的優點是寄生電容較小,因為在製造過程中除去元件周圍的寄生區域。因此在同樣收光面積下,高台型結構具有較低的電容值。
    首先,我們探討利用硫化銨溶液,在磷化銦所製做之光偵測器上進行表面鈍化處理,研究其對元件特性所造成的影響,並將其結果與未進行硫化處理之元件做比較。從實驗結果我們得知,磷化銦表面在經過硫化處理之後,除了能去除表面原生氧化層之外,更能夠在半導體表面形成硫鍵結物防止表面再度氧化,也因此能有效減少表面鍵結電荷及相對應的電容,暗電流於 -10 V時由 6.46×10-11 A降為4.56×10-11 A,電容值在電壓為0V時由0.534 pF減少至0.313 pF;在偏壓-5V時由0.294 pF減少至0.169 pF。因此,經過硫化處理之元件具有較佳的電特性。
    另一方面,為了更有效的提高元件性能,我們利用氮化矽(SiN)具有良好階梯覆蓋性,與二氧化矽(SiO2)能夠成長到一定厚度而不龜裂的特性,將氮化矽疊上二氧化矽形成複合膜鈍化層,並與單層之氮化矽鈍化層做電性比較。若使用硫化銨((NH4)2Sx) 溶液對元件做硫化處理後,暗電流於 -10 V時則由4.56×10-11 A降至2.37×10-11 A;電容值在電壓為0 V時由0.495 pF減少至0.313 pF;在偏壓-5 V時由0.268 pF減少至0.169 pF。驗證複合膜能有效結合兩種材料之優點,更有效的提升元件性能。而元件總電容在偏壓-5V時由0.294 pF減少至0.169 pF,且在眼圖中驗證所製作之元件資料傳輸都能達到12.5Gbit/sec且清楚的看到眼圖(無誤碼)。


    In this paper, we use the epitaxy wafer of InP Substrates to make the PIN structure of the Mesa-type light detector, and the surface of the element was treated with a solution of ammonium sulfide ((NH4) 2Sx), to further explore the effect of Vulcanization characteristics on the characteristics of the element.. After the element in the paper by vulcanization treatment, showing some good component characteristics, such as low leakage current, low capacitance and better high frequency characteristics. In order to block the leakage current, we further use silicon nitride (SiN) plus silicon dioxide (SiO2) multilayer passivatio. Calculate, measure and analyze trends and eye pattern of I-V and C-V.
    Compared with the planar structure, the advantages of mesa-type structure are low parasitic capacitance, because the parasitic area around the element is removed during the manufacturing process. So in the same light area, the mesa-type structure has a lower capacitance value.
    First of all, we explore the use of ammonium sulfide solution, made of indium phosphide light detector on the surface passivation treatment, to study its effect on component characteristics, and to compare the results with those without vulcanization. From the experimental results we know that the surface of indium phosphide after vulcanization treatment, in addition to remove the original oxide layer of the surface,
    the abler to form a sulfur bond on the surface of the semiconductor to prevent re-oxidation, and therefore can effectively reduce the surface bonding Charge and the corresponding capacitance. When the dark current is reduced from 6.46 × 10-11 A to 4.56 × 10-11 A at -10 V, the capacitance value is reduced from 0.534 pF to 0.313 pF at a voltage of 0 V; reduced from 0.294 pF to 0.169 at bias -5V PF. Thus, the vulcanized element has better electrical characteristics.

    On the other hand, in order to more effectively block the leakage current, we use silicon nitride (SiN) has a good ladder coverage, and silicon dioxide (SiO2) has the characteristics which can grow to a certain thickness without cracking, the silicon nitride superimposed on silicon dioxide is formed into a multilayer passivatio passivation layer and is compared with a single layer of silicon nitride passivation layer.
    If the element is treated with ammonium sulfide ((NH4) 2Sx) solution, the dark current is reduced from 4.56 × 10-11 A to 2.37 × 10-11A at -10 V. It is proved that the multilayer passivatio can effectively combine the advantages of the two materials and effectively block the leakage current. And in the eye pattern to verify the production of the element data transmission can reach 12.5Gbit / sec and clearly see the eye pattern (no error).

    摘要 i Abstract ii 目錄 iv 圖目錄 vii 表目錄 ix 第一章 緒論 1 1-1 光通訊發展 1 1-2 光網路技術發展 1 1-3 研究動機 4 第二章 基本原理與文獻回顧 6 2-1 磷化銦PIN光偵測器原理 6 2-1-1 PIN結構光偵測器 6 2-1-2 光偵測器特性 7 2-1-3磷化銦光偵測器 11 2-2 PECVD沉積鈍化層 11 2-3 半導體的表面硫化處理 14 第三章 元件製作與成果 15 3-1製程設備 15 3-1-1沉積製程設備 15 化學氣相沈積系統(Plasma Enhanced Chemical Vapor Deposition, PECVD) 15 電子槍蒸鍍系統(E-gun) 15 化學鍍金機(Immersion gold ) 15 3-1-2微影製程設備 17 光罩對準曝光儀(Karl Suss MA6 Aligner) 17 光罩對準曝光機(ABM contact mask aligner) 17 3-1-3 蝕刻製程設備 19 反應離子蝕刻機(Reactive ion etching , RIE) 19 感應耦合電漿蝕刻機(Inductively-Coupled-Plasma,ICP) 19 3-1-4 其他製程設備 21 快速熱退火爐(ARTS-RTA) 21 紫外光臭氧清洗機(UV-Ozone Stripper) 21 3-1-5 量測設備 22 掃描式電子顯微鏡(Scanning Electron Microscope, SEM) 22 載子生命週期量測儀(Photoconductance lifetime tester) 23 表面輪廓儀(Alpha-Step) 24 半導體參數測試儀 (HP4145) 24 3-2 元件結構設計 26 3-3 元件製作流程 27 3-3-1 試片清洗(wafer cleaning) 27 3-3-2 P型金屬(P-contact Metal)製作 27 3-3-3 定義高台(Mesa) 28 3-3-4 鈍化層製作 30 3-3-5 絕緣層製作 31 3-3-6 金屬接線、N型金屬製程 32 第四章 實驗量測與結果討論 34 4-1 量測系統架設 34 4-1-1 I-V量測 34 4-1-2 C-V量測 35 4-1-3 眼圖(eye pattern)量測 36 4-2 量測結果與分析 39 4-2-1 I-V量測分析 39 4-2-2 C-V計算及量測分析 40 4-2-3眼圖量測分析 44 第五章 結論與未來展望 47 5-1 結論 47 5-2 未來展望 48 參考文獻 50

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