於大多p - i - n 光電二極體大多厚度為150 至200 μm，本論文討論了在晶圓背面以一維光柵結構提升背收光矽基光電二極體之主動層吸收率，此背收光之光柵結構可進一步減薄其晶圓厚度同時實現覆晶(flip-chip) 封裝進而降低產品厚度達45%

This paper demonstrates a backside illuminated photodiode with 45% package thickness reduction and maintains the same level or higher power absorbance in the active area by adding a dielectric grating structure on the backside of the silicon base p - i - n photodiode. Compare the front-illuminated silicon p - i - n photodiode with general thickness in 150 μm to 200 μm. This paper design a dielectric grating on the back side of the silicon photodiode and further reduce the silicon thickness to 75 μm, which is the mature capability for the wafer thinning process. As a back-illuminated photodiode, it can apply to the flip-chipped package structure and further reduce the total package thickness from 0.55 mm to 0.305 mm with 45% thickness reduction.

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