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研究生: 陳威宇
Wei-Yu Chen
論文名稱: 透過光學微影發展約瑟夫森接面製程以製作參量放大器
指導教授: 陳永富
口試委員:
學位類別: 碩士
Master
系所名稱: 理學院 - 物理學系
Department of Physics
論文出版年: 2024
畢業學年度: 112
語文別: 中文
論文頁數: 40
中文關鍵詞: 超導電路參量放大器
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  • 這篇論文介紹了對過去兩吋和四吋晶圓上約瑟夫森接面的黃光微影製程的延續發展。利用中興貴重儀器的雷射直寫機台進行曝光,運用交叉式沉積的原則設計了最小一微米線寬的光罩,接著在中央使用電子槍蒸鍍鋁金屬並進行氧化,製作出約瑟夫森接面,最終目標是利用此晶圓尺度製程製作參量放大器。論文主要探討了脫模製程(lift-off)參數對製程成功率的影響,以及在靜態曝氧的氧化壓力範圍為0.5 Torr到4 Torr之間,氧化壓力對約瑟夫森接面室溫電阻電阻率的影響。在lift-off測試中觀察到金屬蒸鍍時樣品的翻轉角度、蒸鍍的金屬膜厚以及曝光時塗佈曝光光阻的均勻度對lift-off成功率的影響最為顯著。完成約瑟夫森接面後,在排除了設計所產生的線阻後,觀察到約瑟夫森接面的電導值與面積成正比,並且其正比比值所代表的電導率與氧化壓力呈負相關,最後也證實了,透過此製程所製作的約瑟夫森接面及直流超導干涉元件能夠調整其共振頻率。


    This thesis describes the continued development of photolithography processes for Josephson junction on two-inch and four-inch wafers. Using laser direct writing system from the instrument center of NCHU to produce the photomask with a line width of one micron was designed using the cross-type deposition principle. We use an e-gun system in NCU to deposit and oxidize aluminum metal film to create a
    Josephson junction. The final goal of this fabrication process is to make parametric amplifiers on wafer scale. This thesis mainly discusses the impact of lift-off parameters on the success rate of the fabrication, and the impact of oxidation pressure on the room temperature resistivity of the Josephson junction when the pressure range of static oxidation is between 0.5 Torr and 4 Torr. In the lift-off test, we observe that the tilt angle of the sample during metal deposition, the thickness of the metal
    film, and the uniformity of the exposed photoresist during exposure have the most significant impact on the lift-off yield. After fabricating the Josephson junction, and
    excluding the wire resistance caused by the design, we find that the conductance of the Josephson junction is roportional to the area, and the conductance per unit
    area is negatively related to the oxidation pressure. Finally, the Josephson junction and DC-SQUID produced by this process can properly adjust their resonant frequency.

    目錄 摘要 i Abstract ii 誌謝 iii 目錄 iv 圖目錄 vi 1 緒論 1 2 理論背景 2 2.1 約瑟夫森接面(Josephson junction) . . . . . . . . . . . . . . . . . . . 2 2.2 直流超導量子干涉元件 . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.3 室溫電阻與低溫電感 . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 實驗架設與方法 7 3.1 薄膜沉積幾何結構與樣品設計 . . . . . . . . . . . . . . . . . . . . . . 7 3.1.1 Dolan bridge technique . . . . . . . . . . . . . . . . . . . . . . 7 3.1.2 Bridge-free technique . . . . . . . . . . . . . . . . . . . . . . . 9 3.1.3 Cross-type technique . . . . . . . . . . . . . . . . . . . . . . . 11 3.1.4 樣品曝光設計 . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.2 黃光微影製程 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.3 電子槍蒸鍍製程 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3.4 室溫電阻量測架設 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4 實驗結果與分析 16 4.1 脫模參數測試 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.2 室溫電阻量測 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.3 約瑟夫森接面老化 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 iv 4.4 放大器調頻量測結果 . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5 結論 27 References 29

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