在這篇論文中，我們使用Poisson equation 以及current continuity equations設計出包含撞擊游離模型的二維混階元件模擬器。藉由這模擬器，可探討元件內部載子雪崩(avalanche)碰撞的情形，並探討各式元件的雪崩崩潰(avalanche breakdown)，以及相伴隨的載子運動效應。我們以各式SOI元件為論文主軸，先介紹側向式的耐壓二極體(lateral PIN diode)，探討基本電性曲線以及崩潰曲線，並以電場圖形幫助元件耐壓的設計。接著引入SOI NMOS，部分空乏(partially depleted)的N型電晶體在較高電壓中，會因為載子的碰撞造成kink effect，我們利用分支切割的計算方式，去分析kink造成的原因，將kink曲線區分成兩個生成因素: 嚴重的基底效應(body effect)以及嚴重的寄生BJT電流效應。最後，SOI基板上薄膜側向式雙擴散電晶體(FDLDMOS)的模擬與探討，此元件具備優秀的耐壓特性，且於最佳崩潰電壓條件設計下，無可避免會生成kink effect，因此我們引入挖洞的SOI元件的結構設計，避免載子的累積，達到消除kink曲線的效果。

In this paper, we design the mix-level 2-D device simulator which includes the impact-ionization model to simulate the avalanche breakdown and the carrier effect of SOI devices. First, we study the electric field and the breakdown curve in a lateral PN diode. By observing the electric field distribution, we can design a device with higher breakdown. Second, in the partially depleted SOI NMOS, we use the branch-cut method to analyze the causes of the kink effect. We analyze current components by the branch-cut method, and find the causes of the kink effect and the second kink effect. The kink effect is due to the body effect and the second kink effect is due to the parasitic BJT effect. Next, we introduce the thin-film fully depleted SOI lateral double-diffused MOS to find the kink-effect environment. In the optimum breakdown condition, the kink effect always happened unfortunately. Finally, we use the patterned-SOI structure to eliminate the kink effect. This structure can avoid the carrier accumulation, and then the kink effect is disappeared.

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