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研究生: 羅時斌
Shih-Pin Lo
論文名稱: 高靜電防護之蕭特基二極體之研究
Optimized ESD Protection Schottky Diode for GaAs pHEMT RF SPST Switch Application
指導教授: 詹益仁
Yi-Jen Chan
口試委員:
學位類別: 碩士
Master
系所名稱: 資訊電機學院 - 電機工程學系
Department of Electrical Engineering
畢業學年度: 95
語文別: 中文
論文頁數: 88
中文關鍵詞: 微波開關器高電子遷移率電晶體靜電放電蕭特基二極體閘極周長
外文關鍵詞: RF switch, pHEMT, Schottky Diode, ESD, Gate Periphery
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  • 本論文針對砷化鎵蕭特基二極體佈局參數進行靜電防護能力之研究,從實際靜電測試結果,發現二極體之閘極周長與人體模型(HBM)電壓呈現正比關係。在閘極寬度(Gate Width, W)為37.5 μm、閘極長度(Gate Length, L)為1.5 μm,閘極指數目(Gate Finger Number, N)為8時,其人體模型(HBM)靜電測試電壓可達1250伏特以上。同時針對二極體元件之熱效應進行模擬與驗證,發現元件的散熱能力和靜電承受能力呈現正比的關係。所以,針對靜電防護之砷化鎵蕭特基二極體,有兩個主要的因素,分別是元件閘極周長,以及元件散熱能力。最後,將最佳化之砷化鎵蕭特基二極體應用在砷化鎵高電子遷移率電晶體(pHEMT)之微波開關器上,經由量測得知,其插入損失(Insertion Loss)在1.1dB以下,隔離度(Isolation)在33 dB以上,功率處理能力(P1dB) (OFF state)在1W (30dBm)以上,面積為0.3-mm2,同時經過ESD-HBM測試,靜電承受能力達1000V以上。


    This thesis is about that proceeding with the research for the ESD protection ability to the Schottky diode layout parameter of GaAs. According to the result of ESD test, we can find that the gate periphery of the diode and HBM voltage can be direct proportion. While the gate width is 37.5 μm, gate length is 1.5 μm , the Gate Finger Number is 8, the voltage of the ESD test can be up to more than 1250 voltage for the HBM voltage. We also do the simulation and prove to the heat effect of the diode. To make optimized Schottky Diode of the GaAs be applied in the micro-wave switch of GaAs pHEMT. According to the result, the insertion loss is under 1.1dB, isolation is over 33 dB, power handling capability(P1dB)(OFF state) is above of 1W(30dBm), the area is 0.3-mm2. Through the ESD-HBM test at the same time, the ESD bearing ability reaches above 1000V.

    中文摘要 I Abstract II 誌謝 III 目錄 IV 圖目錄 VII 表目錄 XI 第一章 緒論 1 1-1 研究動機與目的 1 1-1-1 為何使用pHEMT設計微波開關? 3 1-2 論文架構 11 第二章 ESD防護之研究 12 2-1 ESD測試模式 12 2-1-1 靜電放電測試方式及故障判斷 17 2-2 常用ESD防護元件或電路之研究 18 2-2-1 二極體(Diode) 18 2-2-2 齊納二極體(Zener diode) 19 2-2-3 矽控整流器(SCR) 20 2-2-4 目前於電路中所使用之防護方法 22 2-3 蕭特基二極體靜電防護架構之研究 24 2-3-1 蕭特基二極體架構 24 2-3-2 最佳化蕭特基二極體佈局參數 26 2-4 蕭特基二極體靜電防護測試結果及討論 32 2-5 本章結論 42 第三章 二極體元件之熱效應模擬與驗證 43 3-1 使用Pulse IV量測方法 43 3-2 使用有限元素分析軟體(ANSYS)模擬 50 3-2-1 電熱理論 51 3-2-2 ANSYS軟體之設定流程 54 3-2-3 模擬結果及討論 58 3-3 使用Thermal IR驗證 63 3-4 結果與討論 66 第四章 RF(Giga-Hz)高頻開關電路之研究 67 4-1 單埠單通(SPST)射頻開關電路設計架構及模擬結果 68 4-2 高頻開關大小訊號量測結果及分析 72 4-2-1 小訊號量測結果及分析 72 4-2-2 大訊號量測結果及分析 73 4-3 本章結論 75 第五章 RF(Giga-Hz)高頻開關電路之ESD防護設計 76 5-1 RF積體電路的ESD保護元件考量 76 5-2 SPST射頻開關電路之ESD保護電路架構及模擬結果 78 5-3 ESD防護設計電路量測結果與討論 83 5-3-1 小訊號量測結果及討論 83 5-3-2 大訊號量測結果及討論 84 5-3-3 靜電測試結果及討論 85 5-4 本章結論 86 第六章 結論 87 附錄 參考文獻 89 發表過之論文 93 發表於2006 Taiwan ESD Conference paper

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