| 研究生: |
李逸仙 I-Hsien Lee |
|---|---|
| 論文名稱: |
補償無乘法數位濾波器有限精準度之演算法設計技巧 Algorithm-Level Impairment Compensation Techniques for Finite-Precision Multilper-less Digital Filters |
| 指導教授: |
蔡宗漢
Tsung-Han Tsai |
| 口試委員: | |
| 學位類別: |
碩士 Master |
| 系所名稱: |
資訊電機學院 - 電機工程學系 Department of Electrical Engineering |
| 畢業學年度: | 89 |
| 語文別: | 中文 |
| 論文頁數: | 65 |
| 中文關鍵詞: | 無乘法器 、座標數位旋轉器 、符號二進位 、數位濾波器 、角度量化 、去相關性 、反放置 |
| 外文關鍵詞: | multiplier-less, CORDIC, SPT, Digital Filter, Angle Quantization, DECOR Transformation, De-allocation |
| 相關次數: | 點閱:8 下載:0 |
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在無乘法器數位濾波器的實現當中,符號化二進位方法及座標角度旋轉演算法被用來代替乘法的運算。然而,因為這兩種方所造成係數或角度分布不均勻的問題,使得在量化上會造成嚴重的誤差,為了克服這個問題,設計者必須使用更多的非零位元或是微旋轉去達到濾波器的規格需求,但這樣的方法卻增加了硬體實現上的複雜度。
在這篇論文當中,我們提出了改良的非相關性轉換方法和改良式角度旋轉器,這些方法提供了系統化的解決方案以避免遭遇前面所提問題。在修正的非相關性轉換方法中,我們先壓縮係數的動態範圍,再將這些經過處理的係數量化至符號化二進位方法所可以表示的位置上。與修正的非相關性轉換方法不同的是,在角度方面,我們的做法是引入數種旋轉技巧去延展可能的角度分布。這些方法減少了在達到需求規格下硬體所需要的複雜度。
在前面的討論中,我們提出了補償無乘法數位濾波器實現上缺陷的方法。事實上,我們還可以進一步的藉由用更少的硬體去重新量化濾波器的係數或角度以達到降低硬體複雜度的目的。為了系統化的達到這個目標,我們針對這些組成係數或角度的基本單元做反放置的程序。經由這種方式可以提供無乘法數位濾波器設計中對於加法器數量很好的控制能力。因此,當我們藉由結合這些技巧,我們可以利用較少的加法器達到所設定的規格。
In this thesis, we propose the Modified DECOR (MDECOR) transformation and the Modified Angle Rotator; they provide systematic solution in avoiding the aforementioned problem. In MDECOR transformation, we compress the dynamic range firstly, then, quantizing these processed coefficients into SPT numbers. Different from MDECOR transformation, we extend the angle constellation by introducing several rotation techniques to compensate the impairment in angle domain. Both of these approaches help to save the hardware complexity to attend the desired specification.
In the above description, we propose the ways to compensate the impairment in multiplier-less filter design. In fact, we can further reduce the cost by reconstructing filter coefficients or angles with less hardware complexity. In order to achieving this propose systematically, we apply the de-allocation procedure on the elementary terms of filter coefficients or angles. It provides good control on the number of adders employed in multiplier-less filter design. As a result, it is capable of designing filter that meet the specification with fewer adders by integrating all these techniques.
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