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研究生： 李銘寰
Ming-Huan Lee
論文名稱： 以場可程式邏輯閘陣列為基礎之穩態視覺誘發電位腦波人機介面系統設計與實現
Design and Implementation of FPGA-Based Steady-State Visual Evoked Potential Brain–Computer Interface System
指導教授： 徐國鎧
Kuo-Kai Shyu
李柏磊
Po-Lei Lee
口試委員:
學位類別： 博士
Doctor
系所名稱： 資訊電機學院 - 電機工程學系
Department of Electrical Engineering
畢業學年度： 98
語文別： 英文
論文頁數： 107
中文關鍵詞： 場可程式邏輯閘陣列 、穩態視覺誘發電位 、大腦人機介面 、浮點運算單元
外文關鍵詞： Field-programmable gate array (FPGA), Floating-point, Brain–computer interface (BCI), Steady-state visual-evoked potential (SSVEP)
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    • 本論文提出一低單價以場可程式邏輯閘陣列（FPGA）為基礎之大腦人機介面（BCI）系統，有別於其它相關研究採用腦電波（EEG）訊號擷取儀器與個人電腦等相關周邊儀器設備。本論文所提之低單價大腦人機介面系統主要包含有：1)以發光二極體（LED）為基礎之閃光誘發面板、2)腦電波訊號擷取電路、與3)以場可程式邏輯閘陣列為基礎之腦電波訊號處理單元。論文所提系統具有即時腦電波訊號處理之能力，並且以穩態視覺誘發電位（SSVEP）作為大腦人機介面之輸入訊號。使用發光二極體能較傳統陰極射線管（CRT）與液晶平面顯示器（LCD）誘發出較強的穩態視覺誘發電位。為了提高腦電波訊號量測的正確性與穩定性並降低環境相關因數等干擾，自製之腦電波訊號擷取電路具有自動停帶調整控制與自動輸出增益/準位調整控制等功能。為了使用較少的閃光誘發頻率來實現多個穩態視覺誘發選項，腦電波訊號處理單元採用單頻多相位編碼技術驅動閃光誘發面板以及辨識所擷取到的穩態視覺誘發電位。透過本系統，使用者可以只藉由其自身腦電波訊號來控制周邊多媒體等裝置。論文所實現之大腦人機介面系統其平均傳輸率（ITR）可達 24.67 位元/秒，並且由實驗結果可知所提之系統具有高達 89.29% 的腦電波訊號辨識正確率。

    This dissertation proposes a low-cost field-programmable gate array (FPGA)-based brain–computer interface (BCI) multimedia control system, different from the BCI system, which uses bulky and expensive electroencephalography (EEG) measurement equipment, personal computer, and commercial real-time signal-processing software. The proposed system combines a customized stimulation panel, a brainwave-acquisition circuit, and an FPGA-based real-time signal processor and allows users to use their brainwave to communicate with or control multimedia devices by themselves. This study also designs a light-emitting diode (LED) stimulation panel instead of cathode ray tube (CRT) or liquid-crystal display (LCD) used in existing studies, to induce a stronger steady-state visual evoked potential (SSVEP), a kind of EEG, used as the input signal of the proposed BCI system. Implementing a prototype of the SSVEP-based BCI multimedia control system verifies the effectiveness of the proposed system. The proposed system has reached an average transfer rate about 24.67 bits/min for normal subjects. Experimental results show that the subjects’ SSVEP can successfully control the multimedia device through the proposed BCI system with high identification accuracy.

    摘要 I ABSTRACT II LIST OF FIGURES VI LIST OF TABLES X ABBREVIATION XI CHAPTER 1 INTRODUCTION 1 1.1. Background and Motivation 1 1.2. Objectives of Dissertation 2 1.3. Survey of Previous Work 2 1.4. Organization of Dissertation 4 CHAPTER 2 BRAIN–COMPUTER INTERFACE 5 2.1. Brain–Computer Interface 5 2.1.1 Electroencephalogram 8 2.1.2 Invasive BCI and Non-Invasive BCI 10 2.1.3 Artifacts 10 2.2. SSVEP-Based Brain–Computer Interface 11 2.2.1 Frequency Coding 13 2.2.2 Phase Coding 14 2.3. Summary 17 CHAPTER 3 MATERIALS AND METHODS 18 3.1. SSVEP Signal Acquisition and Pre-Processing 18 3.1.1 Electrodes 18 3.1.2 Pre-Amplifier 19 3.1.3 Band-Pass Filter 23 3.1.4 Notch Filter 27 3.1.5 Post-Amplifier and Output Adjustment 31 3.1.6 Automatic Notch Filter and Output Adjustment Control 32 3.1.7 SSVEP Signal Acquisition and Pre-Processing PCB 36 3.2. FPGA Hardware Implementation for SSVEP Signal Processing 37 3.2.1 FPGA Design Flow 38 3.2.2 Floating-Point Arithmetic Units 40 3.2.3 IIR Band-Pass Filter 44 3.2.4 Signal Averaging Process 46 3.2.5 Phase Identification 47 3.3. Summary 48 CHAPTER 4 DEVELOPMENT OF FPGA-BASED SSVEP BCI MULTIMEDIA CONTROL SYSTEM 49 4.1. Hardware Design and Implementation 50 4.1.1 System Configuration 50 4.1.2 Visual Stimulation 51 4.1.3 SSVEP Acquisition Circuit 54 4.1.4 ADC Module Board 56 4.1.5 SSVEP Signal Processor 57 4.1.6 Other Circuits 65 4.2. Experimental Verifications 68 4.2.1 Experiments of Automatic Notch Filter Control 70 4.2.2 Experiments of Automatic Post-Amplifier and Output Adjustment Control 73 4.2.3 Experiment of SSVEP Acquisition Module Board 76 4.2.4 Experiment of Proposed System 77 4.3. Summary 80 CHAPTER 5 CONCLUSIONS 82 5.1. Conclusions 82 5.2. Future Work 83 REFERENCES 84 LIST OF PUBLICATIONS 91 VITA 93

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