跳到主要內容

簡易檢索 / 詳目顯示

回結果列表
研究生： 黃煒龍
Wei-Lung Huang
論文名稱： 整合Band解法器與LILU解法器於三維半導體元件之模擬
Integration of Band Solver and LILU Solver for 3-D Semiconductor Device Simulation
指導教授： 蔡曜聰
Yao-Tsung Tsai
口試委員:
學位類別： 碩士
Master
系所名稱： 資訊電機學院 - 電機工程學系在職專班
Executive Master of Electrical Engineering
畢業學年度： 96
語文別： 英文
論文頁數： 47
中文關鍵詞： 階層化不完全LU解法器 、三維半導體元件模擬 、帶狀式矩陣解法器
外文關鍵詞： Band Matrix Solver, LILU Solver, 3-D Semiconductor Simulation
相關次數： 點閱：8  下載：0 
分享至:
查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報

    • 本論文主要是整合Band解法器與LILU解法器以開發一套三維半導體元件模擬器，使達到更精確與快速的模擬效果。模擬方式為等效電路法(Equivalent Circuit Method)，其將帕松方程式與電子電洞連續方程式轉換成等效電路模型，以電路模型的行為來模擬半導體元件的行為特性。此法亦方便應用於混階電路的模擬。為了驗證所開發之元件模擬器是否正確，我們模擬了二極體與電晶體並確認其模擬結果。且為瞭解那一解法器模擬三維半導體元件較有效率，我們亦比較了兩種解法器的模擬速度。

    This thesis is on the study for integrating the band solver and LILU solver to develop a set of three-dimensional semiconductor device simulator, so that we can get more accurate and rapid results of the simulation. The manner of simulation is the equivalent circuit method. It transforms Poisson’s equations and the electron and hole continuity equations to the equivalent circuit model, and uses the behavior of equivalent circuit model to simulate the behavior of the semiconductor component. This method is also applied to facilitate the simulation of mixed level circuits. In order to verify the development of the device simulator is correct, we simulated diodes and transistors and confirmed its simulation results. And for understanding which solver is more efficient to simulate three-dimensional semiconductor device, we also compared the simulation speed of these two solvers.

    Contents 1. Introduction 2. Development of 3-D Device Simulation 2.1 Sparse Matrix Solver Development 2.1.1 Band Matrix Solver 2.1.2 Bandwidth Discussion in 3-D Device Simulation 2.1.3 Levelized Incomplete LU Solver 2.2 3-D Device Equivalent Circuit Model 3. Integration of the Band Matrix and LILU Solvers 3.1 Integration of Band and LILU Solvers 3.1.1 Small-resistance Coupling Method in Band Matrix Solver 3.1.2 Connection-Table Construction of LILU Solver 3.2 3-D PN Diode Simulation and Comparison 3.3 3-D BJT Simulation and Comparison 4. Applications in 3-D Device Simulation 4.1 Effect of Contact Size in 3-D Device Simulation 4.2 3-D BJT Simulation in Reverse Active Mode 4.2.1 Current Gain for Different Geometry 4.3 Truncation Parameter in 3-D Simulation 5. Conclusion

    Reference
    [1] Y. T. Tsai, C. F. Dai and M. K. Tsai, “ An Improved Levelized Incomplete LU Method And Its Application to 2D Semiconductor Device Simulation,” Journal of Chinese Institute of Engineers, Vol. 24, pp. 389-396, 2001.
    [2] Y. T. Tsai, C. Y. Lee, and M. K. Tsai, “Levelized Incomplete LU Method and Its Application to Semiconductor Device Simulation,” Solid-state Electronics, Vol. 44, pp. 1069-1075, 2000.
    [3] K. M. Eickhoof and W. L. Engl, “Levelized Incomplete LU Factorization and Its
    Application to Large-scale Circuit Simulation,” IEEE Trans. Computer-Aided Design, Vol. 14, no. 6, pp. 720-727, 1995.
    [4] Y. T. Tsai, J. F. Dai, and M. K. Tsai, “An Improved Levelized Incomplete LU Method and Its Application to 2D Semiconductor Device Simulation, ” Journal of the Chinese Institute of Engineers, Vol. 24, pp. 389-396, 2001.
    [5] J. F. Dai, C. C. Chang, S. J. Li, and Y. T. Tsai, “A More Equivalent-circuit Model
    for Levelized Incomplete LU Factorization in Semiconductor Device Simulation, ”International Electron Devices and Materials Symposia, pp. 278-281, 2002.
    [6] Y. T. Tsai, and T. C. Ke, “Electrode Separation Method to the Boundary Condition for a-Si TFT Mixed-level Simulation.” International Journal of Numerical Modelling: Electronic Networks, Devices, and Fields, Vol. 11, pp. 123-130, 1998.
    [7] P. C. H. Chan and C. T. Sah, “Exact Equivalent Circuit Model for Steady-state Characterization of Semiconductor Device with Multiple-energy-level Recombination Centers, ” IEEE Trans. Electron Device, Vol. ED-26, no. 6, pp. 924-936, 1979.
    [8] K. Mayaram and D. O. Pederson, “Coupling Algorithms for Mixed-level Circuit and Device Simulation, ” IEEE Trans. Computer-Aided Design, Vol. 11, no. 8, 1992.
    [9] J. Vlach and K. Singhal, “Computer Methods for Circuit Analysis and Design,” Van Nostrand Reinhold, New York, pp. 428-430, 1994.
    [10] C. Y. Lee, “Levelized Incomplete LU Factorization and Its Application to Semiconductor Devices, ” M. S. thesis, National Central University, Taiwan.
    [11] M. K. Tsai, “An Improve Levelized Incomplete LU Method and Its Application to 2D Semiconductor Devices Simulation,” M. S. thesis, National Central University, Taiwan.
    [12] J. F. Dai, “Development of 2-D and 3-D Numerical Device Simulator Including an Improved L-ILU Solver and the Circuit Representation of PDM,” Ph.D. dissertation, National Central University, Taiwan.
    [13] C. C. Chang, S. J. Li, and Y. T. Tsai, “Two-dimensional Mixed-level Device and Circuit Simulation Using a Simple Band Matrix Solver,” in EDMS 2005, Kaohsiung, Taiwan, 2005.
    [14] C. C. Chang, “Improvement of 2-D and 3-D Semiconductor Device Simulation Using Equivalent-circuit Model,” Ph.D. dissertation, National Central University, Taiwan.
    [15] A. Sadovnikov and D.J. Roulston, “Quasi-Three-Dimensional Modeling of Bipolar Transistor Characteristics,” IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, Vol. 12, no. 11, 1993.

    QR CODE
    :::