本論文主要針對在藍寶石基板上進行氮化鋁/氮化鎵/氮化鋁銦異質結構研究，場效電晶體設計，並進行不同閘極結構製程分析。
場效電晶體設計上，使用Silvaco TCAD模擬軟體來設計新穎的氮化鋁/氮化鎵/氮化鋁銦電晶體，確認二微電子雲( 2DEG )通道的存在，與源極及汲極區低電阻的特性改善。
在氮化鋁/氮化鎵/氮化鋁銦電晶體閘極製程上，做了三種不同的製程方法，分別為蕭特基閘極電晶體、金屬氧化物半導體電晶體、閘極掘入金屬氧化物半導體電晶體，分別探討分析三種不同製程在電性上的差異。元件在閘極長度為2 m、源極至汲極距離為12 m尺寸下，蕭特基閘極電晶體的臨界電壓為-5.5 V、汲極飽和電流IDSS為125 mA/mm、導通電阻為7.2 mΩ-cm2;金屬氧化物半導體電晶體相較蕭特基閘極電晶體則需要-7 V臨界電壓將元件關閉，而汲極電流提升至150 mA/mm、導通電阻降低為5 mΩ-cm2；閘極掘入金屬氧化物-導體電晶體的臨界電壓和金屬-氧化物-半導體電晶體相較從-7 V往右移至-3 V，電流降低為100 mA/mm、導通電阻為8 mΩ-cm2。

This thesis presents the study on epi-taxial layers and field-effect transistors based on AlN/GaN/InAlN grown on sapphire substrate .Transistor with different gate structures were also discussed.
Silvaco TCAD was used to design and simulate the field effect transistor for the location of 2DEG and improvement in source/drain resistance.
There were three different AlN/GaN/InAlN FET device structures in this study including Schottky gate FET, metal-oxide-semiconductor FET, and gate recess metal-oxide-semiconductor FET. The gate length of the fabricated device is 2 m and the distance between source and drain contacts is 12 m. The threshold voltage of the Schottky gate FET is -5.5 V, the on-state drain current is 125 mA/mm, and the turn on resistance is 7.2 mΩ-cm2. The threshold voltage of the metal-oxide-semiconductor FET is -7 V, the on-state drain current is 150 mA/mm, and the turn on resistance is 5 mΩ-cm2. The threshold voltage of the gate recess metal-oxidesemiconductor FET is -3 V, the on-state drain current is 100 mA/mm, the turn on resistance is 8 mΩ-cm2.

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