本論文研究主題為使用成長於矽基板之氮化鋁銦鎵/氮化鎵異質結構磊晶片製作毫米波功率電晶體，並藉由電子束微影開發T 型閘極製程。論文中以TDUR-P015/ Dilute ZEP-A7 雙層光阻結構進行閘極足部與頭部的曝光，達到高穩定性與高良率的T 型閘極製程，並且透過熱回流製程進行閘極微縮，最終將閘極長度微縮至90 nm 以提升電流增益及高頻特性。另外，本論文亦探討具有不同厚度之氮化鎵表面披覆層結構對於高頻元件的影響，除了轉移與輸出特性曲線亦測量元件之暫態特性，並以X-射線繞射實驗分析元件特性與磊晶差排密度之關聯性。
本論文中製作的高電子遷移率電晶體在直流特性上，具有2 nm 和5 nm GaN cap 厚度元件於閘極長度140 nm 的電流密度分別為876.1 mA/mm 與999.6 mA/mm，而將閘極長度藉由熱回流製程微縮至90 nm 時，其電流密度分別可提升為1035 mA/mm 與1082 mA/mm，而對於不同GaN cap 厚度在元件上的影響，可發現GaN cap 為5 nm 時皆有較優異的特性，較厚的
GaN cap 可以更有效的分散閘極邊緣的電場以降低閘極漏電流，使元件開關比從106 提升至107。另外，以去嵌化小訊號量測具有2 nm 和5 nm GaNcap 厚度之元件，在閘極長度為90 nm 時fT/fmax 分為100.4/110.9 GHz 以及130.4/144.3 GHz，由於GaN cap 厚度的增加使得元件閘極電容下降，所以5 nm GaN cap 元件有較高的截止頻率。這些數據是國際上在相同閘極長度的元件上所獲得最佳的數據。元件的大訊號特性，是操作於Class AB 的狀態，分別在10 GHz 以及28 GHz 下進行量測，不同GaN cap 厚度的元件在10 GHz 時之PAE 為19.29/21.77 %，功率增益為17.22/16.74 dB；而在28 GHz 時之PAE 為17.15/12.38 %，功率增益則為11.31/ 11.43 dB。未來在元件截止狀態之漏電流改善後，大信號特性應可再提升。

This thesis deals with the fabrication and characterization of AlInGaN/GaN on-Si high electron mobility transistors (HEMTs) for millimeter-wave applications, and the development of a T-gate process by electron beam lithography. In this paper, the TDUR-P015/ Dilute ZEP-A7 double-layer photoresist structure is used to expose the gate foot and head to achieve a highstability and high-yield T-gate process. Moreover, the gate length is reduced to 90
nm through a thermal reflow process to enhance current gain and high-frequency characteristics. This thesis also discusses the influence of the GaN cap layer with different thicknesses on high-frequency devices. In addition to the transfer and output characteristic curves, the transient characteristics of the device are also measured, and the correlation with the dislocation density of epitaxy and device characteristics are analyzed by X-ray diffraction experiment.
The electrical characteristics of high electron mobility transistors with 2 and 5 nm GaN cap layer are investigated in this work. Devices with 140 nm gate length have a current density of 876.1 and 999.6 mA/mm, respectively. When the gate length was reduced to 90 nm by a thermal reflow process, the current density can be increased to 1035 and 1082 mA/mm, respectively. The device with an 5 nm GaN cap layer exhibits better DC characteristics than that with a 2 nm cap layer. This is attributed to the thicker GaN cap, which can more effectively disperse the electric field at the edge of gate and reduce the gate leakage current. The device on/off ratio was increased from 106 to 107. In addition, the de embedded small signal measurements show that for the 2-nm and 5-nm cap devices with a gate length of 90 nm, the fT/fmax are 100.4/110.9 GHz and 130.4/144.3 GHz, respectively. The higher cut-off frequency can be attributed to the reduction of gate capacitance of the 5-nm cap device. These results are among the best reported data for devices with the same gate length. The large signal performance of the devices was measured in the Class AB bias condition at 10 GHz and 28 GHz. the PAE for the 2/5-nm cap device is 19.29/21.77%, the power gain is 17.22/16.74 dB at 10 GHz. When operated at 28 GHz, the PAE is 17.15/12.38%, and the power gain is 11.31/11.43 dB, respectively. The large signal
performance can be further improved after reducing the off-state leakage current in the future.

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