| 研究生: |
黃盛豪 Seng-Hao Huang |
|---|---|
| 論文名稱: |
晶圓廠製造執行系統之流程建構與分析 Process Modeling and Analysis for the Manufacturing Execution System of Foundry Fab |
| 指導教授: |
高信培
Hsing-Pei Kao |
| 口試委員: | |
| 學位類別: |
碩士 Master |
| 系所名稱: |
管理學院 - 工業管理研究所 Graduate Institute of Industrial Management |
| 畢業學年度: | 93 |
| 語文別: | 英文 |
| 論文頁數: | 115 |
| 外文關鍵詞: | Unified Modeling Language, Manufacturing Execution System, Goal Tree Success Tree and Master Logic Diagram |
| 相關次數: | 點閱:7 下載:0 |
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This paper focuses on the design and realization of an application framework to develop Manufacturing Execution System (MES) for semiconductor fab to optimize production activities in shop floor and on rapid response for changeful conditions. MES is the accumulation of the methods and tools used to complete production activity from planned order launch to finished goods, which integrates the accurate and up-to-date information even to the decision-making management. As for a semiconductor industry, it is a complex production which needs high automatic and accurate equipments or devices. Besides, the intelligent information systems for administer. These systems include MES, Enterprise Resource Planning (ERP), Advanced Planning and Scheduling (APS), Supervisor Control And Data Acquisition (SCADA), Human Machine Interface (HMI) and so on. It is another issue to interoperate among these systems. In this paper, we put emphasis on the communication between MES and ERP/APS (Planning layer) and SCADA/HMI (Control layer).
We utilize activity diagrams and state diagrams of UML to construct the behavior representations of MES in semiconductor fabrication. This paper mainly presents production flow definition with activity diagrams. Moreover, we further construct the material flow model along with information flow to illustrate MES applied in the actual semiconductor fabrication plant floor. Certainly, the interoperability among the aforementioned systems is also constructed by activity diagrams. In addition to UML, we also apply GTST-MLD (Goal Tree Success Tree and Master Logic Diagram) to validate whether the activity diagrams are corresponded to the eleven functionalities which are defined by MESA International.
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