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| 研究生： |
王君正 Jun-Zheng Wang |
|---|---|
| 論文名稱： |
曲率效應與基體偏壓對半導體元件崩潰之探討 Curvature Effect and Back Gate Bias Effect on Semiconductor Device Breakdown Simulation |
| 指導教授： |
蔡曜聰
Yao-Tsung Tsai |
| 口試委員: | |
| 學位類別： |
碩士 Master |
| 系所名稱： |
資訊電機學院 - 電機工程學系 Department of Electrical Engineering |
| 畢業學年度： | 97 |
| 語文別： | 中文 |
| 論文頁數： | 46 |
| 中文關鍵詞： | 雪崩崩潰 、基體偏壓 、曲率效應 |
| 外文關鍵詞： | curvature effect, back gate bias effect, avalanche breakdown |
| 相關次數： | 點閱：11 下載：0 |
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在這篇論文中，我們使用包含衝撞游離之二維元件模擬器，研究半導體元件內部載子雪崩崩潰之情形。首先，我們使用負載線解決因雪崩崩潰產生之電流急遽增加所造成的程式負擔。接著，為了了解二維數值方塊模擬與實作上不同，所造成之元件崩潰電壓差異，我們設計2-D不同之曲率接面元件進行模擬比較。製造元件時的退火步驟造成不同的擴散參雜區，其影響崩潰電壓值也一併進行探討。最後，基體偏壓一直都視為可以控制元件的一端，進而影響元件崩潰電壓。我們利用SOI PiN二極體元件，進行基體偏壓之模擬。進一步分析改變其崩潰電壓之原因，並加入一層未參雜之元件結構，使之不易受基體偏壓變動之影響。
In this paper, we design a 2-D device simulator which includes the impact-ionization model to simulate the avalanche breakdown. First, we use load line technique to solve the numerical problem due to the rapid breakdown current. Second, for studying the curvature effect on breakdown, we design a 2-D doping region to represent the 2-D curve junction with many small squares in numerical simulation. We compare the breakdown voltage with different curvature devices. Finally, the breakdown voltage in SOI PiN diode can be changed by the back-gate bias. We use 2-D SOI PiN diode to analyze the back-gate bias effect, and insert an un-doped layer to eliminate the back-gate bias effect.
References
[1] M. Shur, “ Introduction to Electronic Devices,” Chapter 3, John Wiley & Sons Inc.,1996.
[2] E. S. Yang, “Microelectronic Devices,” Chapter 5, McGraw-Hill, 1988.
[3] S. Selberherr, “ Analysis and Simulation of Semiconductor Devices,” Chapter 4, Springer-Verlag Wien, 1984.
[4] Neamen, “Electronic Circuit Analysis and Design,” Chapter1, McGraw-Hill, 2nd edition, 2001
[5] D. M. Bressoud, “Appendix to A Radical Approcch to Real Analysis,” 2nd edition, 2006
[6] Robert L. Boylestad, Louis Nashelsky, “Electronic Devices and Circuit Theory,” Chapter 2, Prentice Hall, 9 edition, 2005
[7] V.I. Smirnov, “A Course of Higher Mathematics”, Chapter 5, Oxford New York, 1964
[8] D. V. Speeney, G. P. Carey, “Experimental Study of The Effect of Junction Curvature on Breakdown Voltage in Si,” Solid State Electronics, Vol 10, p177-182, 1967.
[9] S. M. Sze, G. Gibbons, “Effect of Junction Curvature on Breakdown Voltage in Semiconductors,” Solid State Electronics, Vol 9, p831-845, 1966.
[10] S. M. Sze, “Semiconductor Device: Physics and Technology,” Chapter 3, Wiley & Sons Inc., 1985.
[11] S. Merchant, E. Arnold ,H. Baumagart, S. Mukherjee, H. Pein, R.Pinker, “Power Semiconductor Devices and IC’s,” IEEE Int, 1991.
