| 研究生: |
石靖節 Ching-Chieh Shih |
|---|---|
| 論文名稱: |
應變型矽鍺通道金氧半電晶體之研製 The fabrication of Si1-xGex MOSFET |
| 指導教授: |
李佩雯
Pei-Wen Li |
| 口試委員: | |
| 學位類別: |
碩士 Master |
| 系所名稱: |
資訊電機學院 - 電機工程學系 Department of Electrical Engineering |
| 畢業學年度: | 91 |
| 語文別: | 中文 |
| 論文頁數: | 70 |
| 中文關鍵詞: | 矽鍺 、乾蝕刻 |
| 外文關鍵詞: | SiGe, dry etch |
| 相關次數: | 點閱:12 下載:0 |
| 分享至: |
| 查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報 |
應變型矽鍺金氧半電晶體之研製
摘 要
本論文中,吾人利用應變型Si/SiGe異質結構製作了平面式n型與p型金氧半電晶體元件,並探討其在不同閘極通道長度(4.7μm ~ 0.6μm)之電性表現。
由直流I-V特性可清楚得知,應變型矽鍺 pMOSFET元件無論在驅動電流、傳導係數 (gm) 及次臨界斜率皆比bulk Si元件有較佳之特性表現外,同時也展現了較佳的短通道特性上如靜態漏電流Ioff (約低1個數量級)、Ion/Ioff及VT roll off等,因此SiGe pMOSFET元件有極大之潛能運用於高速低功率之電路。
然而,應變型矽鍺nMOSFET元件則因inter valley scattering的影響,故無法如P型元件一般展現出較傳統Si nMOSFET元件更佳之驅動電流與元件速度﹔此外因結構設計未最佳化,導致漏電流過大而無法與bulk Si nMOSFET元件比較其次臨界以及短通道特性表現。
The fabrication of Si1-XGeX MOSFET
Abstract
We have investigated the nMOSFET and pMOSFET with strain Si1-xGex/ Si heterostructure channels formed. The experimental results promise the potential of SiGe heterostructure MOSFET in CMOS application.
The incorporation of 20﹪Ge in the channel provides a drive current and transconductor enhancement and manifests advantage of short channel effect in pMOSFET. From measurement result in nMOSFET, the leakage was occurred and we can’t compare subthreshold region characteristic and short channel effects with bulk Si nMOSFET. The bulk Si nMOSFET drive current was better than the strained Si0.8Ge0.2, so it reduced strained Si0.8Ge02 nMOSFET and pMOSFET drive current difference and device structure become more comparable.
參考文獻資料
[1] S. S. lyer, G. L. Patton, J. M. C. Stork, B. S. Meyerson, and D. L. Harame, "Heterojunction bipolar transistors using Si-Ge alloys," IEEE Transactions on Electron Devices, ED-36, pp. 2043, 1989.
[2] D. -X. Xu, G. -D. Shen, M. Willander, W. -X. Ni and G. V. Hansson, "n- Si/p-Sii-xGex/n-Si double-heterojunction bipolar transistors," Appl. Phys. Lett., vol. 52, pp. 2239, 1988.
[3] T. Tatsumi, H. Hirayama, and N. Aizaki, "Si/GeoJSioJ/Si heterojunction bipolar transistor made with Si molecular beam epitaxy," Appl. Phys. Lett, vol. 52, pp. 895, 1988.
[4] G. L. Patton, J. H. Comfort, B. S. Meyerson, E. F. Crabbe, G. J. Scilla, E. de Fresart, J. M. C. Stork, J. Y. -C. Sun, D. L. Harame, and J. N. Burghartz, "75 GHzfT SiGe-base heterojunction bipolar transistors," IEEE Electron Device Lett., EDL-II, pp. 171, 1990.
[5] C. Smith and A. D. Welbourn, "Prospects for a heterostructure bipolar transistor using a silicon germanium alloy," in Proc. IEEE 1987 Bipolar Circuits and Technology Meeting, pp. 57-64.
[6] S. S. Rhee, J. S. Park, R. P. G. Karunasiri, Q. Ye, and K. L. Wang, "Resonant tunneling through a Si/ GexSil-x /Si heterostructure on a GeSi buffer layer," Appl. Phys. Lett., vol. 53, pp. 204, 1988.
[7] K. Ismail, B. S. Meyerson, and P. J. Wang, "Electron resonant tunneling in Si/SiGe double barrier diodes," Appl. Phys. Lett., vol. 59, pp. 973, 1991.
[8] T. P. Pearsall, J. C. Bean, R. People, and A. T. Fiory, " GexSil-x, modulation- doped p-channel field-effect transistors," Proc. I stint. Symp. Silicon Molecular Beam Epitaxy, ECS Soft Bound Proc. 85-7, p.366, edited by J. C.Bean (Pennington, NJ, 1985)
[9] H. Dambkes, H. J. Herzog, H. Jorke, H. Kibbel, and E. Kasper, "The n-channel SiGe/Si moduladon-doped filed-effect transistor," IEEE Trans. Electron Devices. ED-33, pp. 633, 1986.
[10] H. Ternkin, T. P. Pearsall, J. C. Bean, R. A. Logan, and S. Luryi, " GexSil-x strained-layer superlattice waveguide photodetectors operating near 1.3 μm," Appl. Phys. Lett, vol. 48, pp. 963, 1986.
[11] H. Ternkin, A. Antreasyan, N. A. Olsson, T. P. Pearsall, and J. C. Bean, "Ge().6Sio.4 rib waveguide avalanche photodetectors for 1.3 μm operation," Appl. Phys. Lett., vol. 49, pp. 809, 1986.
[12] P. J. Wang, B. S. Meyerson, F. F. Fang, J. Nocera, and B. Parker, "High hole mobility in p-type moduladon-doped double heterostructures," Appl. Phys. Lett., vol. 55, pp. 2333, 1989.
[13] 廖偉明, "高效能矽鍺互補型金氧半電晶體之研製", 碩士論文, 國立中央大學, 民國91年
[14]Peter Van Zant著 , 姜庭隆譯 "半導體製程" p.268, p.275~276
[15]莊達人編著 "VLSI製造技術" p.269
[16]Michael Quirk, Julian Serda "Semiconductor Manufacturing Technology" p.443, p.450~451
[17] http://elearning.stut.edu.tw/m_facture/ch9.htm
[18]C. Y. Chang, S. M. Sze "ULSI TECHNOLOGY" p.331, p.348~351
[19]佳霖科技於本校STS ICP ETCHER教育訓練課程中提供的資料
[20] http://smithsonianchips.si.edu/ice/cd/MEM96/SEC13.pdf
[21]Yee-Chia Yeo, Qiang Lu, Tsu-Jae King, Chenming Hu,"Enhanced Performance in Sub-100nm CMOSFETs using Strained Epitaxial Silicon-Germanium" IEDM00-753