本研究以p 型閘極氮化鎵高電子遷移率電晶體為研究標的，在做完金
屬閘極後，分別沉積不同組合的雙層鈍化層，包含樣品A 氧化鋁加氧化矽
(Al2O3 + SiO2)、樣品B 氮化矽加氧化矽(Si3N4 + SiO2)以及樣品C 氧化鋯加氧化矽(ZrO2 + SiO2)，以改變鈍化層的介電常數來提高元件的崩潰電壓，並藉由量測來比較不同鈍化層的p 閘極型氮化鎵高電子遷移率電晶體特性。
元件直流特性方面，三個樣品的ID,off 分別為樣品A = 3.1×10-6 mA/mm、樣品B = 1.44×10-5 mA/mm、樣品C = 3.61×10-7 mA/mm，由於樣品A (Al2O3)及C (ZrO2)均使用ALD 沉積，因此其漏電流都比使用PECVD 沉積的樣品B (Si3N4)來的低，很可能是由於後者表面有電漿轟擊造成的缺陷；其中樣品C (ZrO2)的整體表現最佳，能夠有效減少漏電流，同時在低漏電流的情況下還能夠維持1.99 mΩ-cm2 的導通電阻。在動態特性部分，我們以施加偏壓前後之通道電阻比值來表達，在Vgsq = -15 V 下，三個樣品的動態電阻分別為1.19、1.13、1.07，可以證明樣品C (ZrO2)的製程能夠較有效減少表面缺陷，減少電子被捕捉的機會。因為Drain Lag 特性主要由緩衝層來主導，而本研究所使用磊晶片為了提高崩潰電壓，在緩衝層內有碳摻雜，使得三個樣品在Vdsq = 100 V 下，動態電阻分別提升至6.67、3.80、4.55，表示電子被緩衝層捕捉的現象相當嚴重。
元件崩潰特性是本研究的重點之一，預期透過介電質的極化來分散電
場進而減緩撞擊游離的發生，以提升崩潰電壓。三個樣品崩潰電壓分別為
1185 V、955 V、1670 V，可以證明使用高介電常數鈍化層確實可提高元件崩潰電壓。未來，在磊晶結構設計時可以透過強化通道下位障層(back barrier)之效果，降低通道電子被緩衝層捕捉的現象，提升元件動態特性。

This study focuses on the development of p-GaN gate high-electron-mobility
transistors (p-GaN gate HEMTs) for 1200 V applications. Three different duallayer
passivation films were investigated, i.e. Sample A with aluminum oxide and
silicon oxide (Al2O3+SiO2), Sample B with silicon nitride and silicon oxide
(Si3N4+SiO2), and Sample C with zirconium oxide and silicon oxide (ZrO2+SiO2).
The goal is to increase the breakdown voltage of the devices using high dielectric
constant passivation layers.
The off-state drain current (ID, off) is 3.1×10-6 mA/mm, 1.44×10-5 mA/mm,
and 3.61×10-7 mA/mm for Sample A. B, and C, respectively. The difference in the
off-state current could be attributed to the different deposition processes and
dielectric materials of the passivation films. Since the passivation layers of
Sample A (Al2O3) and C (ZrO2) were deposited by atomic layer deposition (ALD),
while the Si3N4 film on Sample B was deposited by plasma-enhanced chemical
vapor deposition (PECVD), which might result in plasma damages on the sample
surface. Among these three samples, Sample C (ZrO2) exhibited the best
performance with a specific on-resistance as low as 1.99 mΩ-cm2 and low
drain/gate leakage current.
As to the dynamic characteristics, the dynamic on-resistance normalized to
unstressed condition was measured after an off-state Vgsq up to -15 V. The dynamic
resistance for Samples A, B, and C was 1.19, 1.13, and 1.07, respectively. Sample
C (ZrO2) demonstrated more effective reduction in surface defects, minimizing
the probability of electron trapping. Since the drain-lag characteristic is also
affected by the buffer layer, which was doped with carbon to increase its resistance
and breakdown voltage, the dynamic resistances after stressed by a Vdsq of 100 V,
increased to 6.67, 3.80, and 4.55 for Sample s A, B, and C, respectively, indicating
a pronounced trapping effect in the buffer layer.
Device breakdown characteristic, one of the focuses of this study, was measured to investigate the effect of dielectric polarization on impact ionization
induced leakage current. The breakdown voltages for the three samples were
1,185 V, 955 V, and 1,670 V, respectively, confirming that high dielectric constant
passivation layers can indeed increase the breakdown voltage of the devices
through dielectric polarization. In the future, adding a back barrier under the
channel to reduce the trapping of channel electrons by the carbon acceptors in the
buffer, might further improve the dynamic characteristics.

[1] Niloufar Keshmiri, Deqiang Wang, Bharat Agrawa, Ruoyu Hou, Ali Emadi,
"Current status and future trends of GaN HEMTs in electrified
transportation," IEEE Access, Vol. 8, No.4, pp. 70553-70571, April 2020.
[2] Huafan Zhang, Jung-Wook Min, Paulraj Gnanasekar, Tien Khee Ng, and
Boon S. Ooi, "InGaN-based nanowires development for energy harvesting
and conversion applications," J. Appl. Phys., Vol. 129, No. 3, pp. 121103,
March 2015
[3] Xiao-Guang He, De-Gang Zhao, De-Sheng Jiang, "Formation of twodimensional
electron gas at AlGaN/GaN heterostructure and the derivation
of its sheet density expression," Chinese Physics B, Vol. 24, No. 6, pp.
067301, June 2015
[4] Nadim Chowdhury, Jori Lemettinen, Qingyun Xie, Yuhao Zhang, Nitul S.
Rajput, Peng Xiang, Kai Cheng, Sami Suihkonen, Han Wui Then, and Tomás
Palacios, "p-channel GaN transistor based on p-GaN/AlGaN/GaN on Si,"
IEEE Electron Device Letters, Vol. 40, No. 7, pp. 1036-1039, July 2019.
[5] Liang-Yu Su, Finella Lee, and Jian Jang Huang, "Enhancement-mode GaNbased
high-electron mobility transistors on the Si substrate with a p-type
GaN cap layer, "IEEE Transactions on Electron Devices, Vol. 61, No. 2, pp.
460-465, February 2014.
[6] A. Berzoy, C. R. Lashway, H. Moradisizkoohi, IEEE Student Members and
Osama A. Mohammed, IEEE, Fellow Energy Systems Research Laboratory,
"Breakdown voltage improvement and analysis of GaN HEMTs through
field plate inclusion and substrate removal," 2017 IEEE 5th Workshop on
Wide Bandgap Power Devices and Applications (WiPDA), pp. 138-142,
December 2017.
[7] Sheng Gao, Xiaoyi Liu, Jingxiong Chen, Zijing Xie, Quanbin Zhou, and
Hong Wang, "High breakdown-voltage GaN-vased HEMTs on silicon with
Ti/Al/Ni/Ti ohmic contacts," IEEE Electron Device Letters, Vol. 42, No. 4,
pp. 481-484, April 2021.
50
[8] Ronghui Hao, Weiyi Li, Kai Fu, Guohao Yu, Liang Song, Jie Yuan, Junshuai
Li, Xuguang Deng, Xiaodong Zhang, Qi Zhou, Yaming Fan, Wenhua Shi,
Yong Cai, Xinping Zhang, and Baoshun Zhang "Breakdown enhancement
and current collapse suppression by high-resistivity GaN cap layer in
normally-Off AlGaN/GaN HEMTs," IEEE Electron Device Letters, Vol. 38,
No. 11, pp. 1567-1570, November 2017.
[9] Injun Hwang, Hyoji Choi, JaeWon Lee, Hyuk Soon Choi, Jongseob Kim,
Jongbong Ha, Chang-Yong Um, Sun-Kyu Hwang, Jaejoon Oh, Jun-Youn
Kim, Jai Kwang Shin, Youngsoo Park, U-in Chung, In-Kyeong Yoo, and
Kinam Kim "1.6kV, 2.9 mΩ cm2 normally-off p-GaN HEMT device," 2012
24th International Symposium on Power Semiconductor Devices and ICs,
No. 7, pp. 41-44, July 2012.
[10] Chia-Hsun Wu, Jian-You Chen, Ping-Cheng Han, Ming-Wen Lee, Kun-
Sheng Yang, Huan-Chung Wang, Po-Chun Chang, Quang Ho Luc, Yueh-
Chin Lin, Chang-Fu Dee, Azrul Azlan Hamzah, and Edward Yi Chang,
Fellow, IEEE "Normally-off tri-gate GaN MIS-HEMTs with 0.76 m·cm2
specific on-resistance for power device applications," IEEE Transactions on
Electron Devices, Vol. 66, No. 8, pp. 3441-3446, Auguest 2019.
[11] Qianlan Hu, Sichao Li, Tiaoyang Li, Xin Wang, Xuefei Li and Yanqing Wu,
"Channel engineering of normally-off AlGaN/GaN MOS-HEMTs by atomic
layer etching and high-k dielectric," IEEE Electron Device Letters, Vol. 39,
No. 9, pp. 1377-1380, September 2018.
[12] A.Fontserèa,b, A.Pérez-Tomása , V. Banua , P.Godignona , J.Millán, H. De
Vleeschouwerc , J. M. Parseyd and P. Moensc, "A HfO2 based 800V/300°C
Au-free AlGaN/GaN-on-Si HEMT technology," 2012 24th International
Symposium on Power Semiconductor Devices and ICs, No. 6, pp. 37-40,
June 2012.
[13] Woojin Choi, Ogyun Seok, Hojin Ryu, Ho-Young Cha, and Kwang-Seok
Seo," High-voltage and low-leakage-current gate recessed normally-off GaN
MIS-HEMTs with dual gate insulator employing PEALD-SiNx/RFsputtered-
HfO2," IEEE Electron Device Letters, Vol. 35, No. 2, pp. 175-177,
February 2014.
[14] Minghua Zhu, Jun Ma, Luca Nela, Catherine Erine, and Elison Matioli,
51
Member, IEEE, "High-voltage normally-off recessed tri-gate GaN power
MOSFETs with low on-resistance, " IEEE Electron Device Letters, Vol. 40,
No. 8, pp. 1289-1292, August 2019.
[15] Joseph Jesudass Freedsman, Toshiharu Kubo, and Takashi Egawa, Member,
IEEE, "High drain current density E-mode Al2O3/AlGaN/GaN MOS-HEMT
on Si with enhanced power device Figure-of-Merit (4×108 V2Ω-1cm-2)" IEEE
Transactions on Electron Devices, Vol. 60, No. 10, pp. 3079-3083, October
2013.
[16] Sheng Gao, Xiaoyi Liu, Jingxiong Chen, Zijing Xie, Quanbin Zhou, and
Hong Wang, "High breakdown-voltage GaN-based HEMTs on silicon with
Ti/Al/Ni/Ti ohmic contacts, "IEEE Electron Device Letters, Vo. 42, No. 4,
pp. 481-484, April 2021.
[17] Huaxing Jiang, Member, IEEE, Qifeng Lyu, Renqiang Zhu, Graduate
Student Member, IEEE, Peng Xiang, Kai Cheng, and Kei May Lau, Life
Fellow, IEEE, "1300 V normally-off p-GaN gate HEMTs on Si with high onstate
drain current," IEEE Transactions on Electron Devices, Vol. 68, No. 2,
pp. 653-657, Febraury 2021.
[18] Masahiro Ishida, Tetsuzo Ueda, Member, IEEE, Tsuyoshi Tanaka, Senior
Member, IEEE, and Daisuke Ueda, Fellow, IEEE, " GaN on Si technologies
for power switching devices," IEEE Transactions on Electron Devices, Vol.
60, No. 10, pp. 3053-3059, October 2013.
[19] Ronghui Hao, Weiyi Li, Kai Fu, Guohao Yu, Liang Song, Jie Yuan, Junshuai
Li, Xuguang Deng, Xiaodong Zhang, Qi Zhou, Yaming Fan, Wenhua Shi,
Yong Cai, Xinping Zhang, and Baoshun Zhang, "Breakdown enhancement
and current collapse suppression by high-resistivity GaN cap layer in
normally-off AlGaN/GaN HEMTs," IEEE Electron Device Letters, Vol. 38,
No. 11, pp, 1567-1570, November 2017.
[20] Hideyuki Hanawa, Hiraku Onodera, Atsushi Nakajima, and Kazushige Horio,
Senior Member, IEEE "Numerical analysis of breakdown voltage
enhancement in AlGaN/GaN HEMTs with a high-k passivation layer," IEEE
Transactions on Electron Devices, Vol. 61, No. 3, pp. 769-775, March 2014.
52
[21] G. D. Wilk, R. M. Wallace, J. M. Anthony, "High-k gate dielectrics: Current
status and materials properties considerations," J. Appl. Phys. Vol. 89, No. 5,
pp. 5243–5275, May 2001.
[22] Davide Cimmino and Sergio Ferrero, "High-voltage temperature humidity
bias test (HV-THB): overview of current test methodologies and reliability
performances," Electronics, No. 11, pp. 1-17, November 2020
[23] A. Stockman; E. Canato; A. Tajalli; M. Meneghini; G. Meneghesso; E.
Zanoni; P. Moens; B. Bakeroot, "On the origin of the leakage current in pgate
AlGaN/GaN HEMTs," 2018 IEEE International Reliability Physics
Symposium (IRPS), No. 3, pp. 4B.5, March 2018.
[24] Ning Xu, Ronghui Hao, Fu Chen, Xiaodong Zhang, Hui Zhang, Peipei
Zhang, Xiaoyu Ding, Liang Song, Guohao Yu, Kai Cheng, Yong Cai, and
Baoshun Zhang,"Gate leakage mechanisms in normally off p-
GaN/AlGaN/GaN high electron mobility transistors," Appl. Phys. Lett., Vol.
113, No. 10, pp. 152104, October 2018.
[25] Nandhakumar Subramani, "Physics-based TCAD device simulations and
measurements of GaN HEMT technology for RF power amplifier
applications"
[26] Yutaka Ohno, Takeshi Nakao, Shigeru Kishimoto, Koichi Maezawa, Takashi
Mizutani, "Effects of surface passivation on breakdown of AlGaN/GaN
high-electron-mobility transistors," Appl. Phys. Lett., Vol. 84, No. 3, pp.
2184, March 2004.
[27] Dong Seup Lee, Xiang Gao, Shiping Guo, and Tomás Palacios, "InAlN/GaN
HEMTs with AlGaN back barriers," IEEE Electron Device Letters, Vol. 32,
No. 5, pp. 617-619, May 2011.
[28] D. Godfrey, D. Nirmal, L. Arivazhagan, Brigis Roy, Yu-Lin Chen, Tien-Han
Yu, Brigis Roy, Wen-Kuan Yeh, D. Godwinraj, "Investigation of
AlGaN/GaN HEMT breakdown analysis with source field plate length for
high power applications," 2020 5th International Conference on Devices,
Circuits and Systems (ICDCS), pp. 244-246, March 2020.
53
[29] Matteo Meneghini, Carlo De Santi, Idriss Abid, Matteo Buffolo, Marcello
Cioni, Riyaz Abdul Khadar, Luca Nela,Nicolò Zagni, Alessandro Chini,
Farid Medjdoub, Gaudenzio Meneghesso,Giovanni Verzellesi,Enrico
Zanoni,and Elison Matioli "GaN-based power devices: Physics,
reliability,and perspectives" J. Appl. Phys., Vol. 130, No.11, pp.181101-48,
November 2021.
[30] Sandeep Kumar , Priti Gupta, Ivor Guiney, Colin J. Humphreys, Srinivasan
Raghavan, R. Muralidharan, and Digbijoy N. Nath "Temperature and bias
dependent trap capture cross section in AlGaN/GaN HEMT on 6-in silicon
with carbon-doped buffer" IEEE Transactions on Electron Devices, Vol.64,
No. 12, pp.1-7, December 2017.
[31] Yoshihiro Kangawa , Toru Akiyama, Tomonori Ito , Kenji Shiraishi and
Takashi Nakayama "Surface stability and growth kinetics of compound
semiconductors: An Ab Initio-based approach" Materials 2013, Vol.6, No.7,
pp.3313, July 2013.
[32] Andrew T. Binder, Robert J. Kaplara, Jeramy R. Dickersona "Limitations in
impact ionization modeling for predicting breakdown in wide bandgap
power semiconductors" 62nd Ele