跳到主要內容

簡易檢索 / 詳目顯示

研究生: 陳建成
Chien-cheng Chen
論文名稱: 高轉換效能電流模式控制之降壓式電源轉換器
A High Efficiency Current Mode Control DC-DC Buck Converter
指導教授: 鄭國興
Kuo-Hsing Cheng
口試委員:
學位類別: 碩士
Master
系所名稱: 資訊電機學院 - 電機工程學系
Department of Electrical Engineering
畢業學年度: 99
語文別: 中文
論文頁數: 73
中文關鍵詞: 電流模式控制降壓切換式穩壓器電源轉換器
外文關鍵詞: power converter, buck converter, current-mode control
相關次數: 點閱:8下載:0
分享至:
查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報
  • 可攜式電子產品短小輕薄功能完整是產品趨勢也是主要的需求,因此低功率高效率成為可攜式電子產品的首要考量,這些利用電池為電力來源的電子電路需要一個能夠提供穩定電壓的電源轉換電路,此電源轉換電路必須要是低功率消耗與高轉換效能,以延長電池工作時間,為提升轉換效能本論文題出一個電流模式控制之降壓式電源轉換器。
    本論文所提出的電流模式控制降壓式電源轉換器,其原理主要是利用偵測電感上電流變化以加速因負載改變時之暫態反應時間,再將一般電流模式控制中所需要用到的電壓轉電流電路去除並且利用電路設計技巧降低內部各個子電路的操作電流消耗,進而提升整體的轉換效能。相較於一般電流模式控制穩壓,此穩壓器會有較高的轉換效能, 此電流模式控制降壓切換式穩壓器的電路設計是以台灣積體電路製造股份有限公司0.35 um 3.3 V 互補式金氧半製程來實現, 而工作電壓的範圍為3.8 V~5.5 V , 操作頻率為1.5 MHz,負載電流範圍為0.05 A~1 A,及轉換效能為97.4 %。此降壓式電源轉換器之線性調節度與負載調節度分別為17.5 mV/V 與1.15 mV/A,晶片面積為2.46 mm2。


    In this changing rapidly era of electronic technology, the major demands of portable electronics are short, thin, and full functionalities. These sub-circuits of the portable electronics, which use batteries for power sources, need a stable supply voltage generating by power converters. These power converters must have low power consumption and high efficiency to extend the service time of portable electronics. Thus, a high efficiency current mode buck converter is presented in this thesis.
    The proposed buck converter uses current-mode controlling mechanism to accelerate the transient response during the transient period. It senses the current variation of the output inductor. Therefore, it achieves low operating current and high efficiency by removing the V-to-I converting circuit. This buck converter has better performance in the specification of efficiency comparing with traditional buck converter with current-mode controlling. This current-mode buck converter is fabricated with TSMC 0.35um 3.3 V CMOS process. In the proposed buck converter, the operation voltage is form 3.8 V to 5.5 V, the output voltage is 3.3 V, the output current is from 0.05 A to 1 A, and the highest efficiency is 97.4 %. The line regulation and load regulation are 17.5 mV/V and 1.15 mV/A, respectively. The chip area is 2.46 mm2.

    摘 要 i Abstract ii 誌謝 iii 目錄 iv 圖目錄 vii 表目錄 x 第1章 緒論 1 1.1 研究背景 1 1.2 研究動機 2 1.3 論文架構 3 第2章 直流對直流穩壓器概論 5 2.1 穩壓器的種類 5 2.1.1 線性穩壓器 5 2.1.2 切換式電容穩壓器 6 2.1.3 切換式穩壓器 7 2.2 切換式穩壓器分類 8 2.2.1 降壓切換式穩壓器 9 2.2.2 其他類型穩壓器 12 2.3 控制電路分類 15 2.3.1 脈波寬度調變 15 2.3.2 脈波頻率調變 16 2.3.3 磁滯控制 17 2.4 穩壓器規格定義與說明 19 2.4.1 轉換效能 19 2.4.2 線性調節度 20 2.4.3 負載調節度 21 2.4.4 暫態響應 21 第3章 降壓切換式穩壓器架構 25 3.1 電流模式控制理論 26 3.1.1 電流模式控制 26 3.1.2 次諧波振盪 27 3.1.3 斜率補償技術 30 3.2 設計概念 33 3.2.1 問題分析 34 3.2.2 電路改善 36 3.3 系統架構 39 3.3.1 系統頻率響應分析 40 3.3.2 補償增益GC(s)架構 43 3.3.3 系統模擬 44 第4章 降壓切換式穩壓器電路設計與模擬 47 4.1 子電路設計與模擬 47 4.1.1 參考電壓源 47 4.1.2 誤差放大器 52 4.1.3 電流偵測電路 54 4.1.4 零電流偵測電路 56 4.1.5 時脈產生電路 57 4.1.6 脈波寬度調變電路 58 4.1.7 非重疊時間產生電路 59 4.2 穩壓器模擬結果 60 4.2.1 暫態模擬 61 4.2.2 線性調節度 63 4.2.3 負載調節度 64 4.2.4 轉換效能 65 第5章 降壓切換式穩壓器佈局與量測 68 5.1 穩壓器電路佈局 68 5.2 晶片量測考量 70 第6章 結論 72 參考文獻 73

    [1] W. L. Hsieh, “High switching dc-dc buck converters in current domain control,” NCTU MS. Thesis, 2008.
    [2] D. Maksimovic, “Power management model and implementation of power management ICs for next generation wireless applications,” Tutorial presented at the International Symposium on Circuits and Systems, 2002.
    [3] G. A. Rincon-Mora and P. E. Allen, “A low-voltage, low quiescent current, Low drop-out regulator,” IEEE J. Solid-State Circuits, vol. 33, no. 1, pp. 36–44, Jan. 1998.
    [4] P. Favrat, P. Deval and M. J. Declercq, “A high-efficiency CMOS voltage doubler,” IEEE J. Solid-State Circuits, vol. 33, pp. 410-416, Mar. 1998.
    [5] R. W. Erickson and D. Maksimovic, “Fundamentals of Power Electronics,” Norwell, MA: Kluwer, 2001.
    [6] H. H. Ko, “A high efficiency synchronous CMOS switching buck regulator with accurate current sensing technique,” NCU MS. Thesis, 2007.
    [7] P. K. T. Mok, “Converter design for integrated power management system,” Tutorial presented at the International Symposium on VLSI Design, Automation and Test, Apr. 2010.
    [8] W. R. Liou, T. H. Chen, Y. L. Kuo, T. Y. Huang and M. L. Yen, “A high efficiency dual-mode buck converter IC for portable applications,” IEEE Trans. Power Electron., vol. 23, no. 2, pp. 667–677, Mar. 2008.
    [9] H.-H. Huang, C. L. Chen and K. H. Chen, “Adaptive window control (AWC) technique for hysteresis dc–dc buck converters with improved light and heavy load performance,” IEEE Trans. Power Electron., vol. 24, no. 6, pp. 1607-1617, Jun. 2009.
    [10] C. F. Lee and P. K. T. Mok, “A monolithic current-mode CMOS DC-DC converter with on-chip current-sensing technique,” IEEE J. Solid-State Circuits, vol. 39, no. 1, pp. 3-14, Jan. 2004.
    [11] K. H. Cheng, C. W. Su and H. H. Ko, “A high-accuracy and high-efficiency on-chip current sensing for current-mode control CMOS dc-dc buck converter,” IEEE Conference on Electronics, Circuits and Systems, Aug. 2008, pp. 458-461.
    [12] H. P. Forghani-zadeh and G. A. Rincon-Mora, “Current-sensing techniques for dc–dc converters,” in Proc. Midwest Symposium on Circuits and Systems, Aug. 2002, vol. 2, pp. 4–7.
    [13] C. Y. Leung, P. K. T. Mok, K. N. Leung and M. Chan, “An integrated CMOS current-sensing circuit for low-voltage current-mode buck regulator,” IEEE Trans. Circuits Syst. II, vol. 52, no. 7, pp. 394–397, Jul. 2005.
    [14] Z. Zhang, “Buck converter control cookbook,” Alpha & Omega Semiconductor Inc., Application notes, Aug. 2008.
    [15] R. B. Ridley, “A new small-signal model for current-mode control,” Ph.D. dissertation, Virginia Polytechnic Institute and State University, Blacksburg, Nov. 1990.
    [16] B. Razavi, “Design of analog CMOS integrated circuits,” New York: McGraw-Hill, 2001.
    [17] W. M. C. Sansen, “Analog design essentials,” Springer, 2006.
    [18] Y. H. Lee, S. J. Wang and K. H. Chen, “Quadratic differential and integration technique in V2 control buck converter with small ESR capacitor,” IEEE Trans. Power Electron., vol. 25, no. 4, pp. 829-838, Apr. 2010.
    [19] C. Shi, B. C. Walker, E. Zeisel, B. Hu and G. H. McAllister, “A Highly Integrated Power Management IC for Advanced Mobile Applications,” IEEE J. Solid-State Circuits, vol. 42, no. 8, pp. 1723-1731, Aug. 2007.
    [20] M. K. Kazimierczuk, “Pulse-width modulated DC–DC power converters,” John Wiley & Sons Ltd, 2008.
    [21] C. L. Chen, W. J. Lai, T. H. Liu and K. H. Chen, “Zero current detection technique for fast transient response in buck dc-dc converters,” IEEE Symposium on Circuits and Systems, May 2008, pp. 2214-2217.
    [22] H. P. Forghani-zadeh and G. A. Rincón-Mora, “An accurate, continuous, and lossless self-learning CMOS current-sensing scheme for inductor-based dc-dc converters,” IEEE J. Solid-State Circuits, vol. 42, no. 3, pp. 665-679, Mar. 2007.
    [23] N. Mohan, T. M. Undeland and W. P. Robbins, “Power Electronics: Converter, Applications, and Design,” Second Ed., New York: Wiley & Sons, 1995.
    [24] R. B. Ridley, “A new, continuous-time model for current-mode control,” IEEE Trans. on Power Electron., vol. 6, no. 2, pp. 271–280, Apr. 1991.
    [25] Y. H. Lee, S. J. Wang, C. Y. Hsieh and K. H. Chen, “Current mode dc-dc buck converters with optimal fast-transient control,” IEEE Symposium on Circuits and Systems, May 2008, pp. 3045-3048.
    [26] C. H. Lin, H. W. Huang and K. H. Chen, “Fast transient technique (FTT) in buck current-mode dc-dc converters for low-voltage SoC systems,” IEEE Custom Integrated Circuits Conference, Sept. 2008, pp.25-28.
    [27] W. J. Lai, “High efficiency slope compensator with input independent load current identification in current mode dc-dc buck converters,” NCTU MS. Thesis, 2008.

    QR CODE
    :::