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研究生: 莊志強
Zh-Qiang Zhuang
論文名稱: 應用於橢圓曲線密碼系統之低複雜性有限場乘法器設計
指導教授: 周世傑
Shyh-Jye Jou
口試委員:
學位類別: 碩士
Master
系所名稱: 資訊電機學院 - 電機工程學系
Department of Electrical Engineering
畢業學年度: 89
語文別: 中文
論文頁數: 77
中文關鍵詞: 橢圓曲線有限場乘法器密碼
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  • 在這篇論文,我們專注在討論橢圓曲線密碼學(ECC)的發展改良其乘法器演算法和架構,我們主要的工作是集中在實現有限場中適用於橢圓曲線密碼學所須要用的低複雜度和高速之實現乘法運算。
    我們根據改良式乘法器演算法來設計出新的第二型乘法器(Type-II multiplier)。在和Massey-Omura設計的第二型乘法器比較中,它有降低硬體中的複雜性和提高乘法器運算速度的優點。如在硬體上,新的第二型乘法器可省下25%的XOR閘的數目。另外,值得一提是在有效實現橢圓曲線密碼系統考量下,我們可利用它和第一型乘法器(Type-I multiplier)組合成新的合成第二型乘法器(Composite Type-II multiplier)。將使橢圓曲線密碼系統之乘法位元數大小(bit-size)有更好的選擇性和效能。而所得到的效能無論在硬體上的複雜性或時間的因素下,幾乎可以與第一型乘法器一樣好。最後應用所提出來的乘法器來完成在橢圓曲線密碼學中整個算術核心電路。


    Contents Contents II List of Figures V List of Tables VIII CHAPTER 1INTRODUCTION1 1.1OVERVIEW OF CRYPTOGRAPHY1 1.2OVERVIEW OF ECC CRYPTOGRAPHY2 1.3MOTIVATION AND GOAL5 1.4CONTRIBUTION OF THE THESIS7 1.5THESIS ORGANIZATION8 CHAPTER 2ELLIPTIC CURVE CRYPTOSYSTEMS10 2.1HISTORY OF ELLIPTIC CURVES10 2.2MATHEMATIC BACKGROUND ON ELLIPTIC CURVES12 2.2.1THE GROUP LAW14 2.2.2ELLIPTIC CURVE ADDITION15 2.2.3ELLIPTIC CURVES OVER GF(2M)19 2.2.4POINT MULTIPLICATION ON ELLIPTIC CURVES21 2.2.5GROUP OPERATION WITH PROJECTIVE COORDINATES22 2.3SUMMARY OF ENCRYPTION/DECRYPTION IN ECC25 CHAPTER 3FINITE FIELD ARITHMETIC26 3.1CHOOSING A FIELD27 3.2REPRESENTATION OF FINITE FIELD ELEMENTS28 3.3COMPUTER ARITHMETIC IN FINITE FIELDS30 3.3.1FINITE FIELD ADDITION (FFA)30 3.3.2SQUARING IN GF(2M)32 3.3.3FINITE FIELD MULTIPLICATION (FFM)33 CHAPTER 4DESIGN OF LOW-COMPLEXITY COMPOSITE FIELDS GF((2N)M) MULTIPLIERS38 4.1PROPOSED NORMAL BASIS TYPE-II MULTIPLIER39 4.1.1IMPROVED MULTIPLICATION ALGORITHM41 4.1.2MULTIPLICATION EXAMPLE43 4.1.3COMPARISON OF MULTIPLICATION ALGORITHMS45 4.2DESIGN OF EFFICIENT NORMAL BASIS MULTIPLIER IN COMPOSITE FIELDS48 4.2.1REVIEW OF TYPE-I ONB MULTIPLIER48 4.2.2PROPOSED TYPE-II COMPOSITE FIELDS MULTIPLIER49 4.2.3COMPARISON OF OTHER MULTIPLIERS53 CHAPTER 5THE DESIGN OF ECC PROCESSOR AND SIMULATION57 5.1ARCHITECTURAL DESIGN OF ECC PROCESSOR58 5.1.1DESIGN OF POINT MULTIPLICATION UNIT58 5.1.2DESIGN OF CONTROL UNIT61 5.1.3ECC PROCESSOR DESIGN63 5.2SIMULATION RESULT67 5.2.1VERIFICATION OF OUR ARCHITECTURE67 5.2.2OTHER TESTING CASES70 CHAPTER 6CONCLUSION73

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